Ibai Erkiaga [Tue, 21 Jan 2025 13:01:30 +0000 (13:01 +0000)]
fpga: fix alignment on fpga cmd usage info
The current implementation generates some alignment issues as well as
some overlapping when all the fpga command options are enabled. The fix
is intended to improve readability of the usage info.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20250121130138.1999916-2-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Alexander Dahl [Tue, 21 Jan 2025 16:22:12 +0000 (17:22 +0100)]
fpga: Avoid ignored-qualifiers warning
Fixes annoying warnings of the following type when built with W=1 (for
each file including fpga.h):
CC drivers/fpga/fpga.o
In file included from /mnt/data/adahl/src/u-boot/include/xilinx.h:7,
from /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:10:
/mnt/data/adahl/src/u-boot/include/fpga.h:61:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
61 | const fpga_desc *const fpga_get_desc(int devnum);
| ^~~~~
/mnt/data/adahl/src/u-boot/include/fpga.h:81:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
81 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:36:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
36 | const fpga_desc *const fpga_get_desc(int devnum)
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:53:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
53 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
Do some type and cast cleanup on that fpga_desc type while at it.
Link: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wignored-qualifiers
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20250121162213.1477506-1-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Tue, 21 Jan 2025 13:41:49 +0000 (14:41 +0100)]
arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a
connection which is used by fdt_fixup_ethernet() for updating
local-mac-address in DT.
On Kria SOM MAC address is read from i2c eeprom at start and based on it
environment variables are created. Without creating aliases U-Boot is not
able to inject local-mac-address DT property and OS won't get the same MAC
address unless another i2c read is happening in OS.
Also aliases are using string not phandle that's why full path has to be
provided but that shouldn't be a big issue because location of ethernet
controller is fixed.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d360e71a0530d201578e27a6997dbd472772e39.1737466907.git.michal.simek@amd.com
Prasad Kummari [Tue, 21 Jan 2025 12:24:59 +0000 (13:24 +0100)]
arm64: zynqmp: enable u-boot itb generation via binman if SPL is enabled
Output images are generated via Binman only if SPL is enabled, as
there is no consumer for them otherwise. An #ifdef check ensures that
when SPL is enabled, Binman generates the U-Boot ITB. If SPL is disabled,
ITB generation is skipped since the ITB format is supported only by SPL.
Without SPL, generating such an image is unnecessary, as it would not be
used
The second reason is that when a DTB is passed, the current logic cannot
handle it without an additional step in U-Boot to parse an appended FIT
image and enable board-specific code to select the correct DTB config.
The MULTI_DTB_FIT configuration should be used if support for multiple
DTBs is required, but SPL is not being used.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7cba738ae36dacf7d1b0cfbaf13e0c9b3a0df225.1737462296.git.michal.simek@amd.com
Michal Simek [Mon, 20 Jan 2025 13:33:47 +0000 (14:33 +0100)]
xilinx: Remove SYS_MALLOC_F_LEN setup via board Kconfig
The commit
e05689242238 ("Kconfig: Change SYS_MALLOC_F_LEN default to
0x2000") already setup default values from board Kconfigs that's why no
reason to duplicate it again.
Fixes:
e05689242238 ("Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c3edd75b7a19d5cc205c9d5c37c2d86189ca3de6.1737380025.git.michal.simek@amd.com
Prasad Kummari [Tue, 7 Jan 2025 12:29:15 +0000 (17:59 +0530)]
configs: zynqmp: Add usb_pgood_delay for SOM boards
Add usb_pgood_delay to ensure proper detection of USB devices.
Increase the USB power good delay on the SOM boards, as this
is required for certain USB sticks otherwise, they may not
be detected.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250107122915.1378284-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Wed, 22 Jan 2025 13:53:34 +0000 (19:23 +0530)]
spi: cadence_qspi: Add missing prototype for cadence_qspi_flash_reset
Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'cadence_qspi_flash_reset'
[-Wmissing-prototypes].
Fixes:
6d234a79e9 ("cadence_qspi: Refactor the flash reset functionality")
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250122135334.1201562-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Padmarao Begari [Mon, 6 Jan 2025 09:51:20 +0000 (15:21 +0530)]
spi: cadence_qspi: Fix OSPI DDR mode alignment issue
If the least significant bit of the address is set to one when
using the DDR protocol for data transfer then the results are
indeterminate for few flash devices. To fix this the least
significant bit of the address is set to zero.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250106095120.800753-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Fri, 17 Jan 2025 06:45:56 +0000 (12:15 +0530)]
arm64: versal2: Enable the OPTEE command
Enable the command OPTEE which runs the basic 'hello world ta'.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250117064556.673369-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Thu, 16 Jan 2025 05:18:57 +0000 (10:48 +0530)]
xilinx: Enable support for Infineon Octal flashes
Added support for Infineon Octal flash components on the
Versal and Versal Net platforms.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250116051857.346921-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Wed, 29 Jan 2025 20:47:12 +0000 (14:47 -0600)]
Gitlab: Add results.xml to the list of artifacts as well.
Whereas with Azure the JUnit results file is available for download,
Gitlab doesn't default to including it as an artifact to download and
only makes it available via its own JUnit parser. Fix this by listing it
as an artifact to save as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 28 Jan 2025 23:29:48 +0000 (17:29 -0600)]
GitLab: Run sandbox on fast amd64 and fast arm64 hosts
Now that we can run sandbox on arm64 hosts, have these jobs run on both
the fast arm64 and amd64 hosts to catch any issues.
Signed-off-by: Tom Rini <trini@konsulko.com>
Liya Huang [Tue, 28 Jan 2025 01:13:16 +0000 (09:13 +0800)]
examples: fix building on arm32
Refer to the commit
a3c101a61348 ("examples: fix building on arm64")
fix for arm32. crt0.S does not even build with:
operating system and architecture:
5.15.0-130-generic x86_64
installed version of gcc and binutils:
gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.3)
GNU ld (GNU Binutils for Ubuntu) 2.34
used defconfig:
stm32h750-art-pi_defconfig
used commands for building:
export CROSS_COMPILE=arm-none-eabi- ARCH=arm
make stm32h750-art-pi_defconfig
make menuconfig # to add
make
examples/api/crt0.S: Assembler messages:
examples/api/crt0.S:32: Error: lo register required -- `ldr ip,=search_hint'
examples/api/crt0.S:33: Error: lo register required -- `str sp,[ip]'
examples/api/crt0.S:39: Error: lo register required -- `ldr ip,=syscall_ptr'
examples/api/crt0.S:40: Error: lo register required -- `ldr pc,[ip]'
make[2]: *** [scripts/Makefile.build:292:examples/api/crt0.o] Error 1
Use valid register names and instructions.
Signed-off-by: Liya Huang <1425075683@qq.com>
Liya Huang [Mon, 27 Jan 2025 09:38:11 +0000 (17:38 +0800)]
API: system info adds FLASH and clk fetches
Refer to api/api platform-powerpc.c implementation
Signed-off-by: Liya Huang <1425075683@qq.com>
Heinrich Schuchardt [Mon, 27 Jan 2025 07:18:46 +0000 (08:18 +0100)]
examples: eliminate CONFIG_STANDALONE_LOAD_ADDR
CONFIG_STANDALONE_LOAD_ADDR has been used for examples/standalone
but not for examples/api.
The suitability of an address to load an ELF binary and run it does
not only depend on the architecture but also on the memory layout of
the board which is not reflected in the default value of
CONFIG_STANDALONE_LOAD_ADDR.
Commit
32b7e39db4d3 ("Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig")
set the default on RISC-V to 0x0 though most boards used 0x80200000
before the patch.
On most boards we can assume 8 MiB of memory available above $loadaddr.
So we can safely use $loadaddr + 4 MiB as load address for the standalone
example and eliminate CONFIG_STANDALONE_LOAD_ADDR altogether.
Fixes:
32b7e39db4d3 ("Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Mon, 27 Jan 2025 06:49:36 +0000 (07:49 +0100)]
examples/api: improve determination of LOAD_ADDR
The current load address for the 'demo' binary does not work for
qemu_arm_defconfig.
The suitability of an address to load an ELF binary and run it does
not only depend on the architecture but also on the memory layout of
the board.
On most boards we can assume that 8 MiB of memory is available above
$loadaddr. So $loadaddr + 0x400000 should work there.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Quentin Schulz [Wed, 22 Jan 2025 15:53:15 +0000 (16:53 +0100)]
image: apply FDTOs on FDT image node without a load property
A FIT image which is NOT using -E when created by mkimage - that is with
image data within the FIT - will fail to apply FDTO if the base FDT
image node does not specify a load property (which points to an address
in DRAM). This is because we check that the FDT address we want to apply
overlay to (i.e. modify and likely increase in size) is not inside the
FIT and give up otherwise. This is assumed necessary because we may then
overwrite other data when applying in-place.
However, we can do better than giving up: relocating the FDT in another
place in DRAM where it's safe to increase its size and apply FDTOs.
While at it, do not discriminate anymore on whether the data is within
the FIT data address space - that is FIT images created with mkimage -E
- as that still may be susceptible to unintended data overwrites as
mkimage -E simply concatenates all blobs after the FIT. If the FDT blob
isn't the last, it'll result in overwriting later blobs when resizing.
The side effect is that the load property in the FIT is only
temporarily used to load the FDT but then relocated right before we
start applying overlays.
Suggested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Tue, 4 Feb 2025 16:23:02 +0000 (10:23 -0600)]
Merge patch series "mediatek: final preparation for OF_UPSTREAM support"
Christian Marangi <ansuelsmth@gmail.com> says:
This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.
The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.
This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.
All patch are the final changes after the pinctrl patch
merged previously.
All patch pass CI tests
Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
Christian Marangi [Mon, 27 Jan 2025 13:40:45 +0000 (14:40 +0100)]
arm: dts: mediatek: add PCIe node for MT7981
Add PCIe node for MT7981 with all the required properties to make PCIe
work.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
John Crispin [Mon, 27 Jan 2025 13:40:44 +0000 (14:40 +0100)]
arm: dts: mediatek: add USB nodes for MT7981
Add USB PHY nodes for MT7981. These are needed for USB support and also
for PCIe support as the u3 PHY can also be used for PHY.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:43 +0000 (14:40 +0100)]
mediatek: mt7981: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:42 +0000 (14:40 +0100)]
mediatek: mt7988: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:41 +0000 (14:40 +0100)]
pinctrl: mediatek: mt7988: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:40 +0000 (14:40 +0100)]
mediatek: mt7986: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:39 +0000 (14:40 +0100)]
pinctrl: mediatek: mt7986: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Christian Marangi [Mon, 27 Jan 2025 13:40:38 +0000 (14:40 +0100)]
pinctrl: mediatek: mt7981: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Tom Rini [Mon, 3 Feb 2025 22:01:44 +0000 (16:01 -0600)]
Merge patch series "vbe: Series part G"
Simon Glass <sjg@chromium.org> says:
This includes the VBE ABrec (A/B/recovery) implementation as well as a
number of patches needed to make it work:
- marking some code as used by SPL_RELOC
- selection of images from a FIT based on the boot phase
- removal of unwanted hash code which increases code-size too much
- a few Kconfig-related additions for VPL
Note: The goal for the next series (part H) is to enable VBE on
rk3399-generic, i.e. able to boot on multiple rk3399-based boards with
only the TPL phase being different for each board.
Link: https://lore.kernel.org/r/20250126184333.4058848-1-sjg@chromium.org/
Simon Glass [Sun, 26 Jan 2025 18:43:29 +0000 (11:43 -0700)]
vbe: Add an implementation of VBE-ABrec
So far only VBE-simple is implemented in U-Boot. This supports a single
image which can be updated in situ.
It is often necessary to support two images (A and B) so that the board
is not bricked if the update is interrupted or is bad.
In some cases, a non-updatable recovery image is desirable, so that the
board can be returned to a known-good state in the event of a serious
failure.
Introduce ABrec which provides these features. It supports three
independent images and the logic to select the desired one on boot.
While we are here, fix a debug message to indicate the function it
called. Provide a maintainers entry for VBE.
Note that fwupdated only supports VBE-simple so far, but supports for
ABrec will appear in time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:28 +0000 (11:43 -0700)]
vbe: Allow VBE to disable adding loadables to the FDT
When VBE operates within VPL it does not want the FDT to be changed.
Provide a way to disable this feature.
Move the FIT_IMAGE_TINY condition out of spl_fit_record_loadable() so
that both conditions are together. This makes the code easier to
understand.
Replace the existing fit_loaded member, which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:27 +0000 (11:43 -0700)]
vbe: Tidy up a few comments
Join the comment block for the fit_image_load() call back to where it
should be. Also fix a debug statement.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:26 +0000 (11:43 -0700)]
vbe: Provide VPL binman-symbols for the next phase
Add support for moving from TPL->VPL->SPL so that the VPL build can fit
properly into the boot flow.
Use #ifdefs to avoid creating unwanted symbols which Binman would then
try (and perhaps fail) to provide.
Add debugging to indicate the next phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:25 +0000 (11:43 -0700)]
vbe: Support providing a linker script
Allow a linker script to be provided for VPL as it is for other U-Boot
phases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:24 +0000 (11:43 -0700)]
lib: Mark gunzip as relocation code
Mark the gunzip code as needed by relocation. This is used to decompress
the next-phase image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:23 +0000 (11:43 -0700)]
lib: Mark memcpy() and memmove() as relocation code
Mark these functions as needed by relocation. These functions are used
to copy data while relocating the next-phase image.
Drop the 'safe' versions from SPL as they are not needed. Change the
static array to a local one, to avoid link errors when trying to access
the data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:22 +0000 (11:43 -0700)]
lib: Mark lz4 as relocation code
Mark the lz4 decompression code as needed by relocation. This is used to
decompress the next-phase image.
Drop the 'safe' versions from SPL as they are not needed. Change the
static array to a local one, to avoid a crash errors when trying to
access the data from relocated code. Make this conditional to avoid a
code-size increase when SPL_RELOC is not used/
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:21 +0000 (11:43 -0700)]
lib: Mark crc8 as relocation code
Mark the crc8 code as needed by relocation. This is used as a simple
check against corruption of the code when copying.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:20 +0000 (11:43 -0700)]
spl: Provide a way to mark code needed for relocation
Add a linker symbol which can be used to mark relocation code, so it can
be collected by the linker and copied into a suitable place and executed
when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:19 +0000 (11:43 -0700)]
spl: Allow spl_load() to be controlled in any xPL phase
Some phases may wish to use full FIT-loading and others not, so allow
this to be controlled.
Add some debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:18 +0000 (11:43 -0700)]
vbe: Support selecting images based on phase in FIT
With SPL we want to specify the phase of the image to be loaded. Add
support for this.
This is the implementation of a FIT feature added to the spec a few
years ago and entails a small code-size increase, about 70 bytes on
Thumb2.
Signed-off-by: Simon Glass <sjg@chromium.org>
Link: https://docs.u-boot.org/en/latest/usage/fit/index.html
Simon Glass [Sun, 26 Jan 2025 18:43:17 +0000 (11:43 -0700)]
spl: Support selecting images based on phase in simple FIT
At present the simple FIT-loader always loads images, ignoring whether
they are intended for the next phase or not.
VBE packages up several images in the same FIT, some destined for VPL
and some for SPL. Add logic to check the phase before loading the
image. Return -EPERM in that case and handle it gracefully.
Fix a unnecessary re-computation of read_offset while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:16 +0000 (11:43 -0700)]
spl: Avoid including hash algorithms which are not wanted
Update the build rule so that hash algorithms are only included in an
SPL build if they are requested. This helps to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 26 Jan 2025 18:43:15 +0000 (11:43 -0700)]
spl: Adjust debugging and xPL symbols
The size of some malloc() fields has reduced on 64-bit machines, but
the spl_reloc code was not updated. Fix this to avoid a compiler
warning.
Also update for the new xPL naming.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 26 Jan 2025 18:43:14 +0000 (11:43 -0700)]
lib: Allow crc16 code to be dropped
This code is not necessarily needed in VPL, even if SPL uses it, so
adjust the rules to allow it to be dropped.
Do the same for the hash API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 26 Jan 2025 18:43:13 +0000 (11:43 -0700)]
mmc: Allow controlling DM_MMC for VPL builds
VPL may want to use driver model for MMC even if TPL does not. Update
the rule in this driver to support that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 26 Jan 2025 18:43:12 +0000 (11:43 -0700)]
sandbox: Update sandbox_vpl to select sha1 and sha256
These algorithms are used in VPL, so enable them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Jan 2025 18:43:11 +0000 (11:43 -0700)]
mbedtls: Add SHA symbols for VPL
Add some symbols for supporting SHA1 etc. for VPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 3 Feb 2025 14:24:49 +0000 (08:24 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/24428
- RISC-V: Add some fixes
- RISC-V: Integrate OP-TEE into the RISC-V boot flow
- RISC-V: Unify implementation of cleanup_before_linux() for RISC-V
ports
- RISC-V: cmd: Add bhyve SBI implementation ID
- Board: K1: Probe dram size during boot phase
Yao Zi [Thu, 23 Jan 2025 09:11:35 +0000 (09:11 +0000)]
riscv: cpu: jh7110: fallback to generic cleanup_before_linux()
JH7110 SoC requires no specific handling before entering Linux kernel.
Let's drop the specific implementation to avoid duplication.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Thu, 23 Jan 2025 09:11:34 +0000 (09:11 +0000)]
riscv: cpu: generic: fallback to generic cleanup_before_linux()
The current implementation is equivalent to the fallback one, so
this shouldn't change any behaviour but cleans the code up only.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Thu, 23 Jan 2025 09:11:33 +0000 (09:11 +0000)]
riscv: add a generic implementation for cleanup_before_linux()
Most RISC-V SoCs have similar cleanup_before_linux() functions. Let's
provide a weak symbol as fallback to reduce duplicated code.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yu-Chien Peter Lin [Sat, 11 Jan 2025 01:55:27 +0000 (09:55 +0800)]
riscv: dts: binman.dtsi: Include OP-TEE OS image
The following diagram illustrates the boot flow for OP-TEE OS
initialization on RISC-V.
(1)-----------+
| U-Boot SPL |
+------------+
|
v
(2)-------------------------------------------------------------+
| OpenSBI (fw_dynamic.bin) |
| (4)------------------------+ |
| | optee dispatcher driver | |
+-----------------+-------^---------|-------+------------------+
M-mode | | |
---------+--[trusted domain]---+----.----+--[untrusted domain]-------
S-mode | (coldboot domain) | | |
v | | v
(3)---------------------------+ |(5)----------------------------+
| OP-TEE OS (tee.bin) | | | U-Boot (u-boot-nodtb.bin) |
+----------------------------+ | +-----------------------------+
| |
| v
|(6)----------------------------+
| | Linux |
| +-----------------------------+
This patch enables the inclusion of the OP-TEE binary within the
U-Boot ITB, allowing it to be loaded to a platform defined address
by U-Boot SPL.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yu-Chien Peter Lin [Sat, 11 Jan 2025 01:55:26 +0000 (09:55 +0800)]
riscv: Add CONFIG_SPL_OPTEE_LOAD_ADDR
Allow specifying load address of OP-TEE binary. It is
recommended that the specified address aligns with the
base address of an PMP-protected NAPOT region and matches
the CFG_TDDRAM_START configuration in OP-TEE.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Fri, 24 Jan 2025 16:00:14 +0000 (17:00 +0100)]
cmd: sbi: add bhyve SBI implementation ID
Bhyve is the hypervisor used by FreeBSD.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Thu, 23 Jan 2025 02:21:40 +0000 (03:21 +0100)]
riscv: AVAILABLE_HARTS is not compatible with XIP
If CONFIG_AVAILABLE_HARTS=y, variable available_harts_lock is created in
the data section which will not be writable while executing from flash.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Huan Zhou [Mon, 20 Jan 2025 04:29:20 +0000 (12:29 +0800)]
riscv: spacemit: k1: probe dram size during boot phase.
Implement functionality to probe and calculate the DRAM size
during the boot phase for the RISC-V spacemit K1 platform.
Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # BPI-F3 16G
Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Hal Feng [Thu, 16 Jan 2025 03:45:34 +0000 (11:45 +0800)]
pinctrl: starfive: Correct driver declaration for starfive_gpio
Use the driver macros so that the driver appears in the
linker list.
Reported-by: Simon Glass <sjg@chromium.org>
Fixes:
732f01aabf53 ("pinctrl: starfive: Add StarFive JH7110 driver")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Michal Simek [Wed, 29 Jan 2025 15:24:32 +0000 (16:24 +0100)]
cmd: Fix Kconfig coding style
Some entries are not using tabs for indentation and also help should use
two spaces indentation.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Weijie Gao [Fri, 24 Jan 2025 08:04:28 +0000 (16:04 +0800)]
net: mediatek: fix coding style of AN8855 switch driver
This patch fixed the following coding style suggested by checkpatch.pl:
1. Use tab instead of space
2. Use BIT() instead of <<
3. Use mdelay for long time delay
4. Remove useless parenthesises
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 24 Jan 2025 03:39:02 +0000 (11:39 +0800)]
pinctrl: mediatek: update mt7981 pinctrl driver based on upstream kernel
Update mt7981 pinctrl driver based on upstream kernel
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Neil Armstrong [Fri, 24 Jan 2025 02:01:48 +0000 (03:01 +0100)]
scsi: do not fill the LUN in the second CDB byte
The SCSI specification originally required that the second
Command Data Byte contain the LUN value in its high-order bits,
but this field has been marked as reserved since the SCSI-3 spec
from 1996.
Some vendors uses this byte to pass vendor specific data,
and specifying the LUN can trigger strange behaviors.
For the record, this happened on an UFS device where LUN0 was
working perfectly and reading the other LUNs would get the last
buffer data that was read for LUN0, making this issue very very
hard to debug.
It's sane to assume U-Boot will probably never encounter
an SCSI-2 multi-LUN device, if somehow it happens the enquiry
command would need to get the SCSI level to handle this case.
The Linux fix was added in [1] to fix the exact same issue.
[1] https://lore.kernel.org/all/Pine.LNX.4.44L0.
1409021108380.2308-100000@iolanthe.rowland.org/
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Daniel Schultz [Thu, 23 Jan 2025 14:43:50 +0000 (06:43 -0800)]
board: phytec: common: k3: Expose product infos to Linux
Call 'phytec_ft_board_fixup' in the common K3 board code
to expose the product name and part number to Linux.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Daniel Schultz [Thu, 23 Jan 2025 14:43:49 +0000 (06:43 -0800)]
board: phytec: common: Add product information to FTD
ft_board_setup inside the board code allows to alter
device-tree during the boot process.
Introduce a new function for the PHYTEC SOM detection
to read the product name and part number from the EEPROM
content and include both into the device-tree as
* phytec,som-part-number
* phytec,som-product-name
This function can be called from the board code when those
values should be exposed to Linux.
This patch also updates the phytec_print_som_info
function and changes the output.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Tom Rini [Wed, 15 Jan 2025 02:07:29 +0000 (20:07 -0600)]
configs/am62x_r5_usbdfu.config: More completely disable MMC
As this fragment turns off MMC in both SPL and full U-Boot, we can turn
the whole symbol off rather than just the MMC driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Eichenberger [Fri, 24 Jan 2025 15:14:30 +0000 (16:14 +0100)]
toradex: tdx-cfg-block: fix switch to user partition
The Toradex configuration block is stored in the first boot partition of
the eMMC. After reading the configuration block, U-Boot switches back to
the user partition. Currently, this operation always targets mmc device
0, even when the configuration block is stored on mmc device 2.
This patch addresses the issue by switching the mmc device set in
CONFIG_TDX_CFG_BLOCK_DEV to the user partition, rather than using the
hardcoded device 0.
Fixes:
a2777ecb9d11 ("toradex: config block handling")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tom Rini [Fri, 31 Jan 2025 14:32:11 +0000 (08:32 -0600)]
Merge tag 'u-boot-stm32-
20250131' of https://source.denx.de/u-boot/custodians/u-boot-stm
STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2
STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
Patrice Chotard [Thu, 9 Jan 2025 10:21:48 +0000 (11:21 +0100)]
ARM: dts: stm32: Update ck_flexgen_08 frequency.
Spurious characters are displayed on U-Boot console.
Usart2 clock is ck_flexgen_08 and its frequency is set
to an incorrect value.
Update ck_flexgen_08 frequency from 100MHz to 64MHz.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Thu, 9 Jan 2025 10:21:47 +0000 (11:21 +0100)]
stm32mp: Fix board_get_usable_ram_top()
mmu_set_region_dcache_behaviour() parameters must be aligned
which is not always the case.
For example for STM32MP2, we stayed stuck inside
mmu_set_region_dcache_behaviour() in an infinite loop because
set_one_region() always return 0 due to start parameter which is
not aligned.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 11 Dec 2024 08:09:36 +0000 (09:09 +0100)]
configs: stm32f469-disco: Set CYCLIC_MAX_CPU_TIME_US to 50000 for stm32f469-disco
Updating the framebuffer takes quite a long time on this slow patform,
set CYCLIC_MAX_CPU_TIME_US to 50000 for stm32f469-disco to avoid
following cyclic warning:
"cyclic function video_init took too long: 46784us vs 5000us max"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 11 Dec 2024 08:09:35 +0000 (09:09 +0100)]
configs: stm32f769-disco: Set CYCLIC_MAX_CPU_TIME_US to 8000 for stm32f769-disco
Updating the framebuffer takes quite a long time on this slow patform,
set CYCLIC_MAX_CPU_TIME_US to 8000 for stm32f769-disco to avoid
following cyclic warning:
"cyclic function video_init took too long: 7280us vs 5000us max"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:48:57 +0000 (13:48 +0100)]
board: st: stm32mp1: Clean env_get_location()
ENV_IS_IN_EXT4 flag is no more used in any STM32 defconfig,
remove the related code.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Fri, 29 Nov 2024 12:33:25 +0000 (13:33 +0100)]
ARM: dts: stm32mp13: Add support of ck_usbo_48m in pre-reloc stage
The clock ck_usbo_48m is a clock source for RCC, so the ck_usbo_48m
clock provided by usbphyc need to be probed when RCC clock driver is
required, in pre-reloc stage.
This patch allow to remove the following warning:
clk_register: failed to get ck_usbo_48m device (parent of usbo_k)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:11 +0000 (13:27 +0100)]
configs: stm32mp25: enable CONFIG_SYS_64BIT_LBA
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:10 +0000 (13:27 +0100)]
configs: stm32mp15: enable CONFIG_SYS_64BIT_LBA
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:09 +0000 (13:27 +0100)]
configs: stm32mp13: enable CONFIG_SYS_64BIT_LBA
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:08 +0000 (13:27 +0100)]
arm: stm32mp: stm32prog: update multiplier is part-size is above SZ_1G
Set multiplier to 'G' if part->size if above SZ_1G.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:07 +0000 (13:27 +0100)]
arm: stm32mp: stm32prog: fix warning when CONFIG_SYS_64BIT_LBA is enable
If CONFIG_SYS_64BIT_LBA flag is enable, following warning is triggered:
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c: In function 'init_device':
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:27: warning: format
'%ld' expects argument of type 'long int', but argument 8 has type
'lbaint_t' {aka 'long long unsigned int'} [-Wformat=]
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/log.h:157:21: note: in definition of macro 'pr_fmt'
157 | #define pr_fmt(fmt) fmt
| ^~~
../include/log.h:182:33: note: in expansion of macro 'log'
182 | #define log_debug(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
| ^~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:17: note: in expansion
of macro 'log_debug'
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ^~~~~~~~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:42: note: format string
is defined here
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ~~^
| |
| long int
| %lld
Cast block_dev->lba to u64 and set the length specifier to %lld which
is ok with or without CONFIG_SYS_64BIT_LBA flag.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 29 Nov 2024 12:27:06 +0000 (13:27 +0100)]
fastboot: Fix warning when CONFIG_SYS_64BIT_LBA is enable
If CONFIG_SYS_64BIT_LBA is enable, following compilation warning is
triggered:
CC drivers/fastboot/fb_mmc.o
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_erase_mmc_hwpart':
../drivers/fastboot/fb_mmc.c:215:35: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
215 | printf("........ erased %lu bytes from mmc hwpart[%u]\n",
| ~~^
| |
| long unsigned int
| %llu
216 | dev_desc->lba * dev_desc->blksz, dev_desc->hwpart);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| |
| long long unsigned int
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_boot_ops':
../drivers/fastboot/fb_mmc.c:261:42: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
261 | printf("........ wrote %lu bytes to EMMC_BOOT%d\n",
| ~~^
| |
| long unsigned int
| %llu
262 | blkcnt * blksz, hwpart);
| ~~~~~~~~~~~~~~
| |
| long long unsigned int
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 27 Nov 2024 16:23:09 +0000 (17:23 +0100)]
stm32: remove dt-binding headers that are available upstream
Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.
Remove these headers so our devicetree and binding headers will both be
in sync with upstream.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 29 Dec 2024 20:53:26 +0000 (21:53 +0100)]
net: phy: Add RGMII RX/TX delay handling to DP83822 PHY
The TI DP83822 does have support for configurable RGMII RX/TX clock
shift, add support for parsing DT properties which describe the RX/TX
clock shift configuration and configuration of the matching bits in
RCSR register.
The shift is only configurable on DP83822, the other PHYs supported
by this PHY driver, namely DP83825/DP83826 variants, do not implement
this functionality and the RCSR bits used to configure the clock shift
are missing from those PHYs.
The shift is configurable separately for RX and TX path. Each path can
either enable the shift or disable the shift using single bit. In case
the shift is disabled, a delay of 0ns is added to the path, otherwise
a delay of 3.5ns is added to the path.
Note that the two RCSR bits 11 and 12 have inverted logic, RCSR bit 12
enables RX internal shift when SET, while RCSR bit 11 enables TX shift
when UNSET.
Signed-off-by: Marek Vasut <marex@denx.de>
Tom Rini [Thu, 30 Jan 2025 20:35:30 +0000 (14:35 -0600)]
Merge patch series "Add support for MediaTek MT7987 SoC"
Weijie Gao <weijie.gao@mediatek.com> says:
This patch series add support for MediaTek MT7987 SoC with its reference
boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these
boards. The clock, pinctrl drivers and the SoC initializaton code are also
included.
Link: https://lore.kernel.org/r/cover.1737621362.git.weijie.gao@mediatek.com
Weijie Gao [Thu, 23 Jan 2025 08:55:05 +0000 (16:55 +0800)]
board: mediatek: add MT7987 reference boards
This patch adds general board files based on MT7987 SoC.
MT7987 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with one spi controller.
So three configs are need for these boot types:
1. mt7987_rfb_defconfig - SPI-NOR (spi2) and SPI-NAND (spi0)
2. mt7987_emmc_rfb_defconfig - eMMC + SPI-NOR (spi2)
3. mt7987_sd_rfb_defconfig - SD + SPI-NOR (spi2)
Note: spi2 also supports booting from SPI-NAND, but not the default option.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 23 Jan 2025 08:55:01 +0000 (16:55 +0800)]
arm: mediatek: add support for MediaTek MT7987 SoC
This patch adds basic support for MediaTek MT7987 SoC.
This includes files that will initialize the SoC after boot and
its device tree.
In order to maximize the continuous usable memory space, MT7987 has its
ATF BL31 loaded at the top of RAM. Since u-boot will also locate itself to
top of RAM, u-boot will read the actual memory region of BL31 and set
correct gd->ram_top to avoid u-boot overlapping with BL31.
As now support for mt7987 hasn't been submitted to linux kernel, all dts
filed will be put to arch/arm/dts. They'll be removed after successfully
being merged by linux kernel, and OF_UPSTREAM will also be switched on.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 23 Jan 2025 08:54:56 +0000 (16:54 +0800)]
mmc: mediatek: add support for MediaTek MT7987 SoCs
This patch adds eMMC/SD support for MT7987 SoC
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 23 Jan 2025 08:54:52 +0000 (16:54 +0800)]
pinctrl: mediatek: add pinctrl driver for MT7987 SoC
This patch adds pinctrl and gpio support for MT7987 SoC
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 23 Jan 2025 08:54:47 +0000 (16:54 +0800)]
clk: mediatek: add clock driver support for MediaTek MT7987 SoC
This patch adds clock driver support for MediaTek MT7987 SoC
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Simon Glass [Mon, 27 Jan 2025 14:52:54 +0000 (07:52 -0700)]
test/py: Add a report show test durations
Execution time varies widely with the existing tests. Provides a way to
produce a summary of the time taken for each test, along with a
histogram.
This is enabled with the --timing flag.
Enable it for sandbox in CI.
Example:
Duration : Number of tests
======== : ========================================
<1ms : 1
<8ms : 1
<20ms : # 20
<30ms : ######## 127
<50ms : ######################################## 582
<75ms : ####### 102
<100ms : ## 39
<200ms : ##### 86
<300ms : # 29
<500ms : ## 42
<750ms : # 16
<1.0s : # 15
<2.0s : # 23
<3.0s : 13
<5.0s : 9
<7.5s : 1
<10.0s : 6
<20.0s : 12
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 30 Jan 2025 01:06:55 +0000 (19:06 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Marek Vasut [Wed, 29 Jan 2025 17:04:34 +0000 (18:04 +0100)]
arm64: renesas: Deduplicate R-Car Gen3 and Gen4 SPL
Move R-Car Gen3 and Gen4 jump_to_image_no_args() into dedicated
rcar64-spl.c file. The implementation of jump_to_image_no_args()
is identical. No functional change.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:33 +0000 (18:04 +0100)]
arm64: renesas: Deduplicate board_early_init_f()
Introduce common weak board_early_init_f() in rcar64-common.c
which is the default implementation in case there is no other
board specific board_early_init_f(). Remove board_early_init_f()
from Salvator-X, ULCB and Draak boards where this function is
empty.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:32 +0000 (18:04 +0100)]
arm64: renesas: Drop unused code and clean up headers on ULCB boards
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:31 +0000 (18:04 +0100)]
arm64: renesas: Drop unused code and clean up headers on Salvator-X boards
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:30 +0000 (18:04 +0100)]
arm64: renesas: Drop unused code and clean up headers on R-Car D3 Draak
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:29 +0000 (18:04 +0100)]
ARM: renesas: Rename common/common.c to common/rcar64-common.c
The common.c content is specific to 64-bit R-Car SoCs, rename
the file to rcar64-common.c and remove R-Car 64-bit ifdeffery
in the file. No functional change.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 29 Jan 2025 17:04:28 +0000 (18:04 +0100)]
ARM: renesas: Simplify board Makefiles
Introduce board/renesas/common/Makefile and remove the multiple
duplicate copies of obj := ../common/*.o from board Makefiles.
Let the build system include the common Makefile using the
HAVE_VENDOR_COMMON_LIB and build the common objects that are
shared by all the boards that way. No functional change intended.
Some of the remaining board files which include board specific
settings have been updated to use obj-y += to avoid rewriting
the board obj-y target and avoid dropping object files from the
build.
The board/renesas/common/Makefile is now also used when building
RZG2L targets which also set CONFIG_RCAR_64 symbol and 32bit R-Car
Gen2 targets, however, this common code is specific to 64bit R-Car
only. Inhibit the build of this common code for RZG2L using extra
ifndef CONFIG_RZG2L and do not include any code for R-Car Gen2 so
far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Marek Vasut [Wed, 29 Jan 2025 17:04:27 +0000 (18:04 +0100)]
ARM: renesas: Drop R8A779A0 V3U Falcon SPL Makefile entry
The SPL on R-Car V3U Falcon is never built, remove the Makefile entry.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Marek Vasut [Wed, 29 Jan 2025 17:04:26 +0000 (18:04 +0100)]
ARM: renesas: Rename board/renesas/rcar-common to board/renesas/common
Rename directory board/renesas/rcar-common to board/renesas/common and
move files. This allows the build system to use HAVE_VENDOR_COMMON_LIB
which automatically includes board/$(VENDOR)/common/Makefile . Create
temporarily empty board/renesas/common/Makefile to be extended with
actual content later in this series. This is a preparatory patch for
board Makefile simplification. No functional change so far.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 25 Jan 2025 12:17:57 +0000 (13:17 +0100)]
net: miiphybb: Fix short name length
Multiple drivers copy the MDIO instance name from struct mii_phy to
struct bb_miiphy_bus, but the name field in these two structs have
different lengths, the bb_miiphy_bus one is 16 bytes, the source one
is 32 bytes. Make sure these two lengths are always synchronized, use
MDIO_NAME_LEN for both.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 18 Jan 2025 06:12:47 +0000 (07:12 +0100)]
net: ravb: Staticize bb_miiphy functions
These functions can be static as they are referenced only in this file.
Make them static. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 18 Jan 2025 06:14:35 +0000 (07:14 +0100)]
net: miiphybb: configs: Drop CONFIG_BITBANGMII_MULTI
It seems that every remaining system which enables BITBANGMII also
enables BITBANGMII_MULTI . Remove the BITBANGMII_MULTI symbol and
assume it is always enabled. This allows removal of a bit of legacy
code. No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tom Rini [Wed, 29 Jan 2025 14:12:21 +0000 (08:12 -0600)]
Merge tag 'tpm-master-
28012025' of https://source.denx.de/u-boot/custodians/u-boot-tpm
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/24375
We have use cases where a previous stage boot loader doesn't have any
TPM drivers. Instead of extending the hardware PCRs it produces an
EventLog that U-Boot later replays on the hardware.
The only real example we have is TF-A, which produces the EventLog using
hashing algorithms created at compile time. This creates a problem to the
TPM since measurements need to extend all active PCR banks. Up to now
we were exiting refusing the extend measurements.
TPMs can be instructed to change their active PCR banks, as long as the
device resets immediately after a reconfiguration. This PR is adding
that functionality. U-Boot can now scan the currently active TPM PCR
banks, the ones it was compiled to support and the ones present in an
EventLog. It the reconfigures the TPM on the fly with the correct algorithms.