pandora-u-boot.git
3 months agoconfigs: am62x_r5: introduce fragment for USB MSC boot
Siddharth Vadapalli [Sat, 1 Mar 2025 08:00:48 +0000 (13:30 +0530)]
configs: am62x_r5: introduce fragment for USB MSC boot

Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
3 months agocommon: console: Delete obsolete VIDCONSOLE_AS_{LCD, NAME} options
Dragan Simic [Sun, 2 Mar 2025 14:52:57 +0000 (15:52 +0100)]
common: console: Delete obsolete VIDCONSOLE_AS_{LCD, NAME} options

The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.

That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
3 months agoarm: dts: npcm7xx: correct the timer node
Jim Liu [Tue, 25 Feb 2025 01:45:05 +0000 (09:45 +0800)]
arm: dts: npcm7xx: correct the timer node

Correct the timer node of dts

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
3 months agoMerge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 14 Mar 2025 15:31:36 +0000 (09:31 -0600)]
Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next

Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this

3 months agoarm64: Enable RW, RX and RO mappings for the relocated binary
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:43 +0000 (15:54 +0200)]
arm64: Enable RW, RX and RO mappings for the relocated binary

Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.

Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.

It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.

Link: https://lore.kernel.org/u-boot/20250129-rockchip-pinctrl-const-v1-0-450ccdadfa7e@cherry.de/
Link: https://lore.kernel.org/u-boot/20250130133646.2177194-1-andre.przywara@arm.com/
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agotreewide: Add a function to change page permissions
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:42 +0000 (15:54 +0200)]
treewide: Add a function to change page permissions

For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agoarm64: mmu_change_region_attr() add an option not to break PTEs
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:41 +0000 (15:54 +0200)]
arm64: mmu_change_region_attr() add an option not to break PTEs

The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agoarm: Prepare linker scripts for memory permissions
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:40 +0000 (15:54 +0200)]
arm: Prepare linker scripts for memory permissions

Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.

It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.

The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).

The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.

Due to the above ignore EFI for now and fix it later once we have the
rest in place.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agodoc: update meminfo with arch specific information
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:39 +0000 (15:54 +0200)]
doc: update meminfo with arch specific information

Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agomeminfo: add memory details for armv8
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:38 +0000 (15:54 +0200)]
meminfo: add memory details for armv8

Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agoMerge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Thu, 13 Mar 2025 22:45:19 +0000 (16:45 -0600)]
Merge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142

- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.

3 months agoKconfig: Introduce CONFIG_WERROR
Paul Barker [Fri, 28 Feb 2025 10:04:33 +0000 (10:04 +0000)]
Kconfig: Introduce CONFIG_WERROR

Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.

This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agolib: rsa: add NULL check for 'algo' in
Anton Moryakov [Tue, 25 Feb 2025 13:53:27 +0000 (16:53 +0300)]
lib: rsa: add NULL check for 'algo' in

- Check return value of fdt_getprop for NULL.
- Return -EFAULT if 'algo' property is missing.
- Prevent NULL pointer dereference in strcmp."

Triggers found by static analyzer Svace.

Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
3 months agomemory: ti-gpmc: Alloc per driver private struct
Vignesh Raghavendra [Wed, 5 Mar 2025 08:41:30 +0000 (14:11 +0530)]
memory: ti-gpmc: Alloc per driver private struct

Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.

Fixes: 9b0b5648d6e4 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
3 months agoboard: ti: j784s4: Update Resource Management configs
Vaishnav Achath [Fri, 28 Feb 2025 05:42:22 +0000 (11:12 +0530)]
board: ti: j784s4: Update Resource Management configs

Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18

The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
3 months agocmd: Drop last reference to CMD_REISERFS
Tom Rini [Thu, 27 Feb 2025 20:50:48 +0000 (14:50 -0600)]
cmd: Drop last reference to CMD_REISERFS

While the code was removed in commit 3766a249a3c0 ("fs: drop reiserfs")
this reference in the Makefile was missed. Remove it now.

Fixes: 3766a249a3c0 ("fs: drop reiserfs")
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agomach-k3: common_fdt: create a reserved memory node
Bryan Brattlof [Thu, 27 Feb 2025 17:14:41 +0000 (11:14 -0600)]
mach-k3: common_fdt: create a reserved memory node

Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
3 months agotest: event: Correct usage of IS_ENABLED() macro in test/common/event.c
Tom Rini [Wed, 26 Feb 2025 20:31:09 +0000 (14:31 -0600)]
test: event: Correct usage of IS_ENABLED() macro in test/common/event.c

This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotools: add HOSTCFLAGS from openssl pkg-config
Raymond Mao [Wed, 26 Feb 2025 14:19:51 +0000 (06:19 -0800)]
tools: add HOSTCFLAGS from openssl pkg-config

HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
3 months agoDockerfile: Add missing 'rm -rf /tmp/coreboot-24.08'
Tom Rini [Wed, 12 Feb 2025 22:24:15 +0000 (16:24 -0600)]
Dockerfile: Add missing 'rm -rf /tmp/coreboot-24.08'

We had missed removing the coreboot directory once done, fix this.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agomailbox: add i.MX Messaging Unit (MU) driver
Peng Fan [Tue, 4 Mar 2025 06:57:40 +0000 (14:57 +0800)]
mailbox: add i.MX Messaging Unit (MU) driver

This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.

This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
3 months agoARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
Marek Vasut [Tue, 11 Mar 2025 01:34:18 +0000 (02:34 +0100)]
ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02

The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoimx8m: soc: cope with existing optee node
Vincent Stehlé [Mon, 10 Mar 2025 12:36:21 +0000 (13:36 +0100)]
imx8m: soc: cope with existing optee node

On i.MX8M SoCs, the /firmware/optee Devicetree node is created just before
booting the OS when OP-TEE is found running. If the node already exists,
this results in an error, which prevents the OS to boot:

  Could not create optee node.
  ERROR: system-specific fdt fixup failed: FDT_ERR_EXISTS
   - must RESET the board to recover.

  failed to process device tree

On the i.MX8M systems where CONFIG_OF_SYSTEM_SETUP is defined, the
ft_add_optee_node() function is called before booting the OS. It will
create the OP-TEE Devicetree node and populate it with reserved memory
informations gathered at runtime.

On on most i.MX8M systems the Devicetree is built with an optee node if
CONFIG_OPTEE is defined. This node is indeed necessary for commands and
drivers communicating with OP-TEE, even before attempting OS boot.

The aforementioned issue can happen on the Compulab IOT-GATE-iMX8, which is
the only in-tree i.MX8M system where both CONFIG_OPTEE and
CONFIG_OF_SYSTEM_SETUP are defined (see the imx8mm-cl-iot-gate*
defconfigs).

Deal with an existing optee node gracefully at runtime to fix this issue.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tim Harvey <tharvey@gateworks.com>
3 months agotoradex: apalis/colibri imx6: Select correct DTB for SoM v1.2+
Ernest Van Hoecke [Fri, 7 Mar 2025 10:34:14 +0000 (11:34 +0100)]
toradex: apalis/colibri imx6: Select correct DTB for SoM v1.2+

When "fdtfile" is not set, use the "variant" environment variable to
select the correct DTB.

Apalis/Colibri iMX6 V1.2 replaced the STMPE811 ADC/Touch controller
which is EOL with the TLA2024 ADC and AD7879 touch controller. They thus
require a different DTB, which we can easily select with the variant env
variable.

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
3 months agoboard: toradex: apalis/colibri imx6: Detect new v1.2 SoM variant
Ernest Van Hoecke [Fri, 7 Mar 2025 10:34:13 +0000 (11:34 +0100)]
board: toradex: apalis/colibri imx6: Detect new v1.2 SoM variant

Apalis/Colibri iMX6 V1.2 will replace the STMPE811 ADC/Touch controller
which is EOL by the TLA2024 ADC and AD7879 touch controller.

To support this new version, we detect the presence of the TLA2024
during boot and set a new environment variable named "variant". This
will allow us and users to select the correct DT easily.

By probing via I2C we have a robust detection method instead of relying
on the existing "board_rev" environment variable which is set by the
config block. Users can use "variant" in their DT selection and do not
have to map the board revision to a device tree.

"variant" environment variable behaviour:
* Empty or absent for all versions below v1.2 (STMPE811)
* "-v1.2" for all versions starting from v1.2 (TLA2024 + AD7879)

Usage example:
setenv fdtfile imx6q-apalis${variant}-${fdt_board}.dtb

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
3 months agoimx9: container.cfg: Guard tee.bin inclusion
Fabio Estevam [Thu, 27 Feb 2025 16:50:01 +0000 (13:50 -0300)]
imx9: container.cfg: Guard tee.bin inclusion

Guard the inclusion of tee.bin with the CONFIG_OPTEE symbol to fix the
following build warning:

  CHECK    u-boot-container.cfgout
WARNING './tee.bin' not found, resulting binary may be not-functional
  BINMAN  .binman_stamp
  OFCHK   .config

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 months agommc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig
Tom Rini [Thu, 27 Feb 2025 15:29:42 +0000 (09:29 -0600)]
mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig

The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 months agoMerge patch series "xPL-stack cleanup"
Tom Rini [Thu, 13 Mar 2025 15:53:12 +0000 (09:53 -0600)]
Merge patch series "xPL-stack cleanup"

Simon Glass <sjg@chromium.org> says:

This series was split from the VBE part H series. It adjusts the logic
for selecting the top of the stack so that it is more consistent across
xPL phases.

Link: https://lore.kernel.org/r/20250228122042.1277079-1-sjg@chromium.org
3 months agoarm: Support a separate stack for VPL
Simon Glass [Fri, 28 Feb 2025 12:20:26 +0000 (05:20 -0700)]
arm: Support a separate stack for VPL

VPL has the same needs as TPL in situations where the stack is at the
top of SRAM. Add an option for this and implement it for arm

Signed-off-by: Simon Glass <sjg@chromium.org>
3 months agospl: Use CONFIG_VAL() to obtain the SPL stack
Simon Glass [Fri, 28 Feb 2025 12:20:25 +0000 (05:20 -0700)]
spl: Use CONFIG_VAL() to obtain the SPL stack

Now that we have the same option for SPL and TPL, simplify the logic for
determining the initial stack.

Note that this changes behaviour as current SPL_STACK is a fallback for
TPL. However, that was likely unintended and can be handled with Kconfig
defaults if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Tom Rini <trini@konsulko.com>
3 months agospl: Add an SPL_HAVE_INIT_STACK option
Simon Glass [Fri, 28 Feb 2025 12:20:24 +0000 (05:20 -0700)]
spl: Add an SPL_HAVE_INIT_STACK option

At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.

Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]

3 months agotpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK
Simon Glass [Fri, 28 Feb 2025 12:20:23 +0000 (05:20 -0700)]
tpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK

The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.

Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.

Move the option just above TPL_STACK which depends on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 months agoMerge patch series "arm: mach-sc5xx: Remove manual bss_clear"
Tom Rini [Thu, 13 Mar 2025 15:52:36 +0000 (09:52 -0600)]
Merge patch series "arm: mach-sc5xx: Remove manual bss_clear"

This series from Greg Malysa <malysagreg@gmail.com> provides two more
fixes for the mach-sc5xx platforms.

Link: https://lore.kernel.org/r/20250228185837.25741-1-malysagreg@gmail.com
3 months agoarm: mach-sc5xx: Remove inappropriate board-specific functions
Greg Malysa [Fri, 28 Feb 2025 18:58:34 +0000 (13:58 -0500)]
arm: mach-sc5xx: Remove inappropriate board-specific functions

The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.

This removes the default empty implementations of both from mach-sc5xx.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agoarm: mach-sc5xx: Remove manual bss_clear
Greg Malysa [Fri, 28 Feb 2025 18:58:33 +0000 (13:58 -0500)]
arm: mach-sc5xx: Remove manual bss_clear

The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agoMerge patch series "Update DDR Configurations"
Tom Rini [Thu, 13 Mar 2025 15:51:46 +0000 (09:51 -0600)]
Merge patch series "Update DDR Configurations"

Santhosh Kumar K <s-k6@ti.com> says:

This series is to update the DDR configurations of AM64x EVM, AM62x SK,
AM62x LP SK, AM62Ax SK and AM62Px SK boards according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Test logs: https://gist.github.com/santhosh21/43723900f3615e4cf98da57ed9618cf9

Link: https://lore.kernel.org/r/20250226063923.2266288-1-s-k6@ti.com
3 months agoarm: dts: k3-am62p: Update DDR Configurations
Santhosh Kumar K [Wed, 26 Feb 2025 06:39:23 +0000 (12:09 +0530)]
arm: dts: k3-am62p: Update DDR Configurations

Update the DDR Configurations for AM62Px SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
3 months agoarm: dts: k3-am62a: Update DDR Configurations
Santhosh Kumar K [Wed, 26 Feb 2025 06:39:22 +0000 (12:09 +0530)]
arm: dts: k3-am62a: Update DDR Configurations

Update the DDR Configurations for AM62Ax SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
3 months agoarm: dts: k3-am62-lp: Update DDR Configurations
Santhosh Kumar K [Wed, 26 Feb 2025 06:39:21 +0000 (12:09 +0530)]
arm: dts: k3-am62-lp: Update DDR Configurations

Update the DDR Configurations for AM62x LP SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
3 months agoarm: dts: k3-am62x: Update DDR Configurations
Santhosh Kumar K [Wed, 26 Feb 2025 06:39:20 +0000 (12:09 +0530)]
arm: dts: k3-am62x: Update DDR Configurations

Update the DDR Configurations for AM62x SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
3 months agoarm: dts: k3-am64: Update DDR Configurations
Santhosh Kumar K [Wed, 26 Feb 2025 06:39:19 +0000 (12:09 +0530)]
arm: dts: k3-am64: Update DDR Configurations

Update the DDR Configurations for AM64x EVM according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
3 months agoMerge tag 'u-boot-stm32-20250312' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Thu, 13 Mar 2025 03:36:52 +0000 (21:36 -0600)]
Merge tag 'u-boot-stm32-20250312' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112

- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
  legacy led and button management.

3 months agoMerge patch series "binman: build_from_git: Add argument specifying branch"
Tom Rini [Wed, 12 Mar 2025 16:25:33 +0000 (10:25 -0600)]
Merge patch series "binman: build_from_git: Add argument specifying branch"

This series from Leonard Anderweit <l.anderweit@phytec.de> provides some
improvements to the binman tool and i.MX specific tooling then makes use
of it.

Link: https://lore.kernel.org/r/20250226210501.72794-1-l.anderweit@phytec.de
3 months agobinman: cst: Build from source
Leonard Anderweit [Wed, 26 Feb 2025 21:05:01 +0000 (22:05 +0100)]
binman: cst: Build from source

Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the description and add a link to documentation.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agobinman: build_from_git: Add optional make path inside git repo
Leonard Anderweit [Wed, 26 Feb 2025 21:05:00 +0000 (22:05 +0100)]
binman: build_from_git: Add optional make path inside git repo

Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agobinman: build_from_git: Add argument specifying branch
Leonard Anderweit [Wed, 26 Feb 2025 21:04:59 +0000 (22:04 +0100)]
binman: build_from_git: Add argument specifying branch

Add optional argument git_branch to build_from_git. The new argument
allows specifying which branch of the repo to use.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoMerge patch series "drivers: Driver support for ADI SC5xx SoCs"
Tom Rini [Wed, 12 Mar 2025 16:25:13 +0000 (10:25 -0600)]
Merge patch series "drivers: Driver support for ADI SC5xx SoCs"

Greg Malysa <malysagreg@gmail.com> says:

This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.

Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
3 months agommc: Add support for ADI SC5XX-family processor SDHCI peripherals
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:34 +0000 (12:30 -0500)]
mmc: Add support for ADI SC5XX-family processor SDHCI peripherals

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
3 months agospi: Add support for ADI SC5XX-family processor SPI peripherals
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:33 +0000 (12:30 -0500)]
spi: Add support for ADI SC5XX-family processor SPI peripherals

This adds support for the ADI-specific SPI driver present in the ADI
SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block
that uses the Cadence driver. Both may be used at once with appropriate
pin muxing configuration.

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
3 months agoremoteproc: Add in SHARC loading for ADI SC5XX-family processors
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:32 +0000 (12:30 -0500)]
remoteproc: Add in SHARC loading for ADI SC5XX-family processors

This adds the ability to load ldr-formatted files to the SHARC
coprocessors using the rproc interface. Only a minimal subset
of rproc functionality is supported: loading and starting
the remote core.

Secure boot and signed ldr verification are not available
at this time through the U-Boot interface.

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
3 months agodma: Add driver for ADI SC5xx-family SoC MDMA functionality
Greg Malysa [Wed, 26 Feb 2025 17:30:31 +0000 (12:30 -0500)]
dma: Add driver for ADI SC5xx-family SoC MDMA functionality

Add a rudimentary MDMA driver for the Analog Devices SC5xx SoCs,
primarily intended for use with and tested against the QSPI/OSPI
IP included in the SoC.

Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
3 months agowatchdog: Add support for ADI SC5XX-family watchdog peripheral
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:30 +0000 (12:30 -0500)]
watchdog: Add support for ADI SC5XX-family watchdog peripheral

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Stefan Roese <sr@denx.de>
3 months agonet: Add support for ADI SC5xx SoCs with DWC QoS ethernet
Greg Malysa [Wed, 26 Feb 2025 17:30:29 +0000 (12:30 -0500)]
net: Add support for ADI SC5xx SoCs with DWC QoS ethernet

The ADI SC598 includes a Designware QoS 5.20a IP block. This
commit adds support for using the existing ethernet QoS driver
with the SC598 SoC.

Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agoi2c: Add support for ADI SC5XX-family I2C peripheral
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:28 +0000 (12:30 -0500)]
i2c: Add support for ADI SC5XX-family I2C peripheral

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
3 months agousb: musb-new: Add support for Analog Devices SC5xx SoCs
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:27 +0000 (12:30 -0500)]
usb: musb-new: Add support for Analog Devices SC5xx SoCs

This adds support for the MUSB-based USB controller found in the
Analog Devices SC57x and SC58x SoCs.

Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
3 months agogpio: Add support for ADI ADP5588 GPIO expander chips
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:26 +0000 (12:30 -0500)]
gpio: Add support for ADI ADP5588 GPIO expander chips

This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
<michael.hennerich@analog.com>

Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
3 months agogpio: Add support for SC5XX-family processor GPIO driver
Greg Malysa [Wed, 26 Feb 2025 17:30:25 +0000 (12:30 -0500)]
gpio: Add support for SC5XX-family processor GPIO driver

This adds support for using the GPIO pins on the SC5XX family of SoCs
from Analog Devices.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agodoc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl
Greg Malysa [Wed, 26 Feb 2025 17:30:24 +0000 (12:30 -0500)]
doc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl

This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agopinctrl: Add support for ADI SC5XX-family pinctrl
Greg Malysa [Wed, 26 Feb 2025 17:30:23 +0000 (12:30 -0500)]
pinctrl: Add support for ADI SC5XX-family pinctrl

This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
3 months agoMerge patch series "pci_auto: Downgrade prefetch if necessary"
Tom Rini [Wed, 12 Mar 2025 16:24:05 +0000 (10:24 -0600)]
Merge patch series "pci_auto: Downgrade prefetch if necessary"

This series from Patrick Rudolph <patrick.rudolph@9elements.com> fixes
an issue with how we treat PCIe vs PCI in some cases and fixes the
qemu-arm-sbsa reference platform support.

Link: https://lore.kernel.org/r/20250226135647.194842-1-patrick.rudolph@9elements.com
3 months agoemulation: qemu-sbsa: Enable PCI enumeration
Patrick Rudolph [Wed, 26 Feb 2025 13:56:44 +0000 (14:56 +0100)]
emulation: qemu-sbsa: Enable PCI enumeration

Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.

TEST: U-Boot logo, version, log output and the U-Boot shell is visible
      on the display device.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
3 months agoemulation: qemu-sbsa: Select SYS_PCI_64BIT
Patrick Rudolph [Wed, 26 Feb 2025 13:56:43 +0000 (14:56 +0100)]
emulation: qemu-sbsa: Select SYS_PCI_64BIT

qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
3 months agopci_auto: Downgrade prefetch if necessary
Patrick Rudolph [Wed, 26 Feb 2025 13:56:42 +0000 (14:56 +0100)]
pci_auto: Downgrade prefetch if necessary

Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
prefetchable 32-bit BARs, while PCIe devices are not allowed to have
32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
typically the prefetch MMIO window is also 64-bit and placed above
4GiB, as it's the case on qemu sbsa-ref.

Currently the U-Boot code assumes that prefetchable BARs are
64-bit BARs and always tries to assign them into the prefetch
MMIO window.

When a 32-bit BAR is marked as prefetch, but the prefetch area is
not within the first 4GiB of the address space, then downgrade the
BAR and place it in the non-prefetch MMIO window.

For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.

TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
3 months agoserial: stm32: restrict _debug_uart_init() usage
Patrice Chotard [Thu, 30 Jan 2025 11:57:54 +0000 (12:57 +0100)]
serial: stm32: restrict _debug_uart_init() usage

Since commit 948da7773e34 ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.

So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).

It's more needed to call debug_uart_init() in stm32mp1/cpu.c.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 months agoboard: st: stm32f746-disco: Update MAINTAINERS file
Patrice Chotard [Mon, 10 Mar 2025 12:52:25 +0000 (13:52 +0100)]
board: st: stm32f746-disco: Update MAINTAINERS file

Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 months agoARM: dts: stm32: Add TIMERS inverted PWM channel 3 on STM32MP135F-DK
Cheick Traore [Tue, 11 Mar 2025 14:30:37 +0000 (15:30 +0100)]
ARM: dts: stm32: Add TIMERS inverted PWM channel 3 on STM32MP135F-DK

The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 months agoconfigs: stm32mp13: Enable MFD timer and PWM for stm32mp13_defconfig
Cheick Traore [Tue, 11 Mar 2025 14:30:36 +0000 (15:30 +0100)]
configs: stm32mp13: Enable MFD timer and PWM for stm32mp13_defconfig

Enable the following configs:

* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
                           timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables support for the STM32 PWM devices

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 months agopwm: stm32: add driver to support pwm with timer
Cheick Traore [Tue, 11 Mar 2025 14:30:35 +0000 (15:30 +0100)]
pwm: stm32: add driver to support pwm with timer

Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 months agomach-stm32: add multifunction timer driver support
Cheick Traore [Tue, 11 Mar 2025 14:30:34 +0000 (15:30 +0100)]
mach-stm32: add multifunction timer driver support

Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 months agoMerge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into...
Tom Rini [Wed, 12 Mar 2025 13:56:16 +0000 (07:56 -0600)]
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next

3 months agoMerge branch 'graph' of https://source.denx.de/u-boot/custodians/u-boot-tegra into...
Tom Rini [Wed, 12 Mar 2025 13:55:47 +0000 (07:55 -0600)]
Merge branch 'graph' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next

3 months agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
Tom Rini [Wed, 12 Mar 2025 01:05:03 +0000 (19:05 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next

3 months agonet: ravb: Fix RX frame size limit
Paul Barker [Tue, 4 Mar 2025 20:07:08 +0000 (20:07 +0000)]
net: ravb: Fix RX frame size limit

The value written to the RFLR register includes the length of the CRC
data at the end of each Ethernet frame. So we need to increase the value
written to this register to ensure that we can receive full size frames.

While we're here we can also copy the improved comment from the Linux
kernel.

Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: ravb: Add dependency on CONFIG_BITBANGMII
Paul Barker [Tue, 4 Mar 2025 20:07:07 +0000 (20:07 +0000)]
net: ravb: Add dependency on CONFIG_BITBANGMII

The Renesas RAVB driver always requires bitbang MDIO bus support.

Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoclk: rzg2l: Ignore disable for core clocks
Paul Barker [Tue, 4 Mar 2025 19:44:35 +0000 (19:44 +0000)]
clk: rzg2l: Ignore disable for core clocks

Following on from commit 9a699a0a0d62 ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: miiphybb: Drop mdio_init()
Marek Vasut [Sun, 2 Mar 2025 01:24:52 +0000 (02:24 +0100)]
net: miiphybb: Drop mdio_init()

Inline mdio_init() back into mdio_alloc(), separate
access to mdio_init() is no longer necessary.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_bus
Marek Vasut [Sun, 2 Mar 2025 01:24:51 +0000 (02:24 +0100)]
net: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_bus

These functions are no longer necessary, remove them.
The struct bb_miiphy_bus is no longer necessary either,
remove it as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agoarm: mvebu: a38x: Switch back to mdio_alloc()
Marek Vasut [Sun, 2 Mar 2025 01:24:50 +0000 (02:24 +0100)]
arm: mvebu: a38x: Switch back to mdio_alloc()

Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: sh_eth: Switch back to mdio_alloc()
Marek Vasut [Sun, 2 Mar 2025 01:24:49 +0000 (02:24 +0100)]
net: sh_eth: Switch back to mdio_alloc()

Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: 08eefb5e792d ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: ravb: Switch back to mdio_alloc()
Marek Vasut [Sun, 2 Mar 2025 01:24:48 +0000 (02:24 +0100)]
net: ravb: Switch back to mdio_alloc()

Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: 079eaca6e7b4 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: designware: Switch back to mdio_alloc()
Marek Vasut [Sun, 2 Mar 2025 01:24:47 +0000 (02:24 +0100)]
net: designware: Switch back to mdio_alloc()

Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: cbb69c2fafcc ("net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Drop priv from struct bb_miiphy_bus
Marek Vasut [Sun, 2 Mar 2025 01:24:46 +0000 (02:24 +0100)]
net: miiphybb: Drop priv from struct bb_miiphy_bus

Remove the priv member from struct bb_miiphy_bus and its assignment
from drivers. This turns struct bb_miiphy_bus int struct mii_dev
wrapper, to be cleaned up next.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write()
Marek Vasut [Sun, 2 Mar 2025 01:24:45 +0000 (02:24 +0100)]
net: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write()

Access to MDIO bus private data can be provided by both
struct mii_dev .priv member and struct bb_miiphy_bus .priv
member, use the former directly and remove .priv from the
later. Drop unused bb_miiphy_getbus(). This removes any
dependency on struct bb_miiphy_bus from the miiphybb code,
except for helper functions which will be removed later.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write()
Marek Vasut [Sun, 2 Mar 2025 01:24:44 +0000 (02:24 +0100)]
net: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write()

The access to struct bb_miiphy_bus_ops via ops pointer in
struct bb_miiphy_bus is not necessary with wrappers added
in previous patch. Pass the ops pointer directly to both
bb_miiphy_read() and bb_miiphy_write() functions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Wrap driver side bb_miiphy_read/write() accessors
Marek Vasut [Sun, 2 Mar 2025 01:24:43 +0000 (02:24 +0100)]
net: miiphybb: Wrap driver side bb_miiphy_read/write() accessors

Do not call bb_miiphy_read()/bb_miiphy_write() accessors directly
in drivers, instead call them through wrapper functions. Those are
meant to be used as function parameter adaptation layer between
struct mii_dev callback function parameters and what the miiphybb
does expect and will soon expect. This is a preparatory patch, no
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Split off struct bb_miiphy_bus_ops
Marek Vasut [Sun, 2 Mar 2025 01:24:42 +0000 (02:24 +0100)]
net: miiphybb: Split off struct bb_miiphy_bus_ops

Move miiphybb operations into separate struct bb_miiphy_bus_ops
structure, add pointer to struct bb_miiphy_bus_ops into the base
struct bb_miiphy_bus and access the ops through this pointer in
miiphybb generic code. The variable reshuffling in miiphybb.c
cannot be easily avoided.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agopinctrl: renesas: Drop special RZN1 entry from Makefile
Marek Vasut [Fri, 28 Feb 2025 12:02:52 +0000 (13:02 +0100)]
pinctrl: renesas: Drop special RZN1 entry from Makefile

The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.

Fixes: e4aea57fa773 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agoARM: renesas: Enable USBHS UDC and UMS on Renesas R-Car Gen3 Salvator-X(S)
Marek Vasut [Sun, 9 Feb 2025 15:05:16 +0000 (16:05 +0100)]
ARM: renesas: Enable USBHS UDC and UMS on Renesas R-Car Gen3 Salvator-X(S)

The Renesas R-Car Gen3 Salvator-X(S) boards contain USB micro-B port
on which the USBHS controller is accessible. Enable the USBHS UDC
driver to make this port usable, enable UMS USB Mass Storage support
to make it possible to expose block devices as USB Mass Storage to
Host PC.

The USB VID/PID is picked from R-Car Series, 3rd Generation reference
manual Rev.2.00 chapter 19.2.8 USB download mode, and matches R-Car H3
BootROM USB download mode VID/PID.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoconfigs: qc750: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:47:02 +0000 (19:47 +0200)]
configs: qc750: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoconfigs: x3_t30: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:39:55 +0000 (19:39 +0200)]
configs: x3_t30: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoconfigs: picasso: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:39:27 +0000 (19:39 +0200)]
configs: picasso: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoconfigs: grouper: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:38:17 +0000 (19:38 +0200)]
configs: grouper: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoconfigs: endeavoru: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:37:39 +0000 (19:37 +0200)]
configs: endeavoru: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoconfigs: transformer: add 3 second delay before power off
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:37:08 +0000 (19:37 +0200)]
configs: transformer: add 3 second delay before power off

Introduce a 3-second delay and an informational message during boot to
enhance user experience.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoARM: tegra20: mark second DC with bootph-all
Svyatoslav Ryhel [Wed, 5 Mar 2025 10:19:20 +0000 (12:19 +0200)]
ARM: tegra20: mark second DC with bootph-all

For the Tegra 2, similar to other Tegra SoC generations, 'bootph-all'
must be applied to both display controllers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoARM: tegra: clock: fix PLLD/PLLD2 related clock calculations
Jonas Schwöbel [Tue, 4 Mar 2025 07:02:11 +0000 (09:02 +0200)]
ARM: tegra: clock: fix PLLD/PLLD2 related clock calculations

While PLLD/D2 is the nominal parent clock, all derived clocks are generated
from its single output, plld_out0, which is PLLD/D2 divided by two. Direct
use of PLLD/D2 is absent in peripheral clock configurations. Therefore,
clock derivation formulas must take in account this division.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agocommon: edid: update timing selection logic
Jonas Schwöbel [Mon, 3 Mar 2025 11:31:07 +0000 (13:31 +0200)]
common: edid: update timing selection logic

Older EDID timing algorithms relied solely on detailed timings, typically
optimized for a display's native resolution. This caused issues with newer
4K panels on older hardware, which couldn't handle those high resolutions.
To address this, the algorithm now also considers standard timings, offering
lower, compatible resolutions. Future improvements may include checking
established timings for even broader compatibility.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoboard: xiaomi: mocha: add Xiaomi Mi Pad A0101 support
Svyatoslav Ryhel [Sat, 16 Nov 2024 12:33:47 +0000 (14:33 +0200)]
board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support

The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of
internal memory that can be supplemented with a microSDXC card giving up to
128 GB of additional storage.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
3 months agoMerge tag 'net-next-20250310' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 11 Mar 2025 14:57:33 +0000 (08:57 -0600)]
Merge tag 'net-next-20250310' of https://source.denx.de/u-boot/custodians/u-boot-net into next

Pull request net-next-20250310.

CI:
* https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25084

net-lwip:
* Add support for CA (root) certificates to HTTPS
* Add CONFIG_LWIP_DEBUG_RXTX to trace in/out messages

3 months agoconfigs: qemu_arm64_lwip_defconfig: enable WGET_CACERT
Jerome Forissier [Wed, 5 Mar 2025 14:26:47 +0000 (15:26 +0100)]
configs: qemu_arm64_lwip_defconfig: enable WGET_CACERT

Enable the "wget cacert" command.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>