Svyatoslav Ryhel [Tue, 4 Mar 2025 17:59:59 +0000 (19:59 +0200)]
ARM: tegra: p1801-t: configure HDMI binding
Bind HDMI for ASUS AiO P1801-t to provide full panel support and improve
usability.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 1 Mar 2025 12:48:09 +0000 (14:48 +0200)]
ARM: tegra: endeavoru: upgrade video bindings
Upgrade HTC One X device tree to comply possible upstream Linux device
tree. Once Linux catches up, HTC One X can be switched to OF_UPSTREAM.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 15 Feb 2025 17:49:23 +0000 (19:49 +0200)]
ARM: tegra: lg_x3: upgrade video bindings
Upgrade LG P895 and P880 device tree bindings according to preliminary
upstream Linux tree. Once Linux catches up, LG X3 can be switched to
OF_UPSTREAM without regressions.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Thu, 13 Mar 2025 07:59:12 +0000 (09:59 +0200)]
video: edid: guard standard timings EDID expansion behind kconfig
Since EDID only indicates supported standard timings, a large table with
detailed timing information is necessary, consuming significant space. To
mitigate this, the table is made configurable via kconfig, allowing it to
be excluded when not needed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 15:47:36 +0000 (17:47 +0200)]
video: backlight: lm3533: set up backlight according to device tree
Configure backlight lm3533 child according to device tree description.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 15:22:47 +0000 (17:22 +0200)]
video: backlight: lm3533: configure core in the probe
Configure core stuff in the probe.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 15:05:37 +0000 (17:05 +0200)]
video: backlight: lm3533: add more flexibility with device tree
Configure LM3533 based on preliminary device tree configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:18:24 +0000 (16:18 +0200)]
video: sharp-lq101r1sx01: add missing LPM flag
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:16:11 +0000 (16:16 +0200)]
video: samsung-ltl106hl02: add missing LPM flag
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 4 Mar 2025 19:29:01 +0000 (21:29 +0200)]
video: renesas-r69328: add power supplies
Convert enable GPIO into a set of supplies.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 4 Mar 2025 19:22:04 +0000 (21:22 +0200)]
video: renesas-r69328: fix reset gpio direction
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:08:10 +0000 (16:08 +0200)]
video: renesas-r69328: add missing mode flags
Add missing MIPI DSI mode flags.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 4 Mar 2025 19:13:33 +0000 (21:13 +0200)]
video: renesas-r61307: fix reset gpio direction
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 4 Mar 2025 09:48:15 +0000 (11:48 +0200)]
video: renesas-r61307: adjust compatible
Vendor prefix of Hitachi should be "hit" to comply Linux
vendor prefix list.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:06:16 +0000 (16:06 +0200)]
video: renesas-r61307: add missing mode flags
Add missing MIPI DSI mode flags.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:03:18 +0000 (16:03 +0200)]
video: lg-ld070wx3: add missing LPM flag
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:01:07 +0000 (16:01 +0200)]
video: endeavoru-panel: add missing LPM flag
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 1 Mar 2025 12:37:59 +0000 (14:37 +0200)]
video: endeavoru-panel: move backlight request after probe
Due to the use of the Tegra DC backlight feature by the HTC ONE X,
backlight requests MUST NOT be made during probe or earlier. This is
because it creates a loop, as the backlight is a DC child.
To mitigate this issue, backlight requests can be made later, once the
backlight is actively used.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Wed, 5 Mar 2025 06:31:35 +0000 (08:31 +0200)]
video: bridge: ssd2825: fix reset gpio direction
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 16:37:35 +0000 (18:37 +0200)]
video: bridge: ssd2825: add power supplies
Convert enable GPIO into a set of supplies according to
datasheet.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 12:06:00 +0000 (14:06 +0200)]
video: bridge: ssd2825: set default minimum tx_clk
If TX_CLK is not set or gives an error, use SSD2825_REF_MIN_CLK.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 11:59:35 +0000 (13:59 +0200)]
video: bridge: ssd2825: make pixel format calculation more obvious
Use switch condition to get pixel format.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 11:54:45 +0000 (13:54 +0200)]
video: bridge: ssd2825: add HS delays configuration
Set HS Zero and Prepare delays from device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 18 Feb 2025 16:57:54 +0000 (18:57 +0200)]
video: bridge: ssd2825: move post configuration from transfer function
Reconfigure post panel enable bridge configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 15 Feb 2025 17:48:20 +0000 (19:48 +0200)]
video: bridge: ssd2825: convert to use of_graph
Use OF graph parsing helpers to get linked panel.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Feb 2025 13:27:20 +0000 (15:27 +0200)]
video: bridge: ssd2825: convert to video bridge UCLASS
Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
its user has bridge support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sun, 23 Feb 2025 09:41:10 +0000 (11:41 +0200)]
video: bridge: tc358768: remove need in clock name
Bridge uses only one clock and enforcing name to be set may
cause issues in the future.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sun, 23 Feb 2025 09:39:13 +0000 (11:39 +0200)]
video: bridge: tc358768: simplify power supplies request
Simplify power supply request logic.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 11:29:43 +0000 (13:29 +0200)]
video: bridge: tc358768: convert to use of_graph
Use OF graph parsing helpers to get linked panel.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Feb 2025 13:28:28 +0000 (15:28 +0200)]
video: bridge: tc358768: convert to video bridge UCLASS
Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
its user driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Feb 2025 13:29:19 +0000 (15:29 +0200)]
video: bridge: dp501: convert to video bridge UCLASS
Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
its user driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 21 Feb 2025 12:13:08 +0000 (14:13 +0200)]
video: tegra20: dsi: respect speed mode used for DSI commands transfer
Use DSI message flag to set correct speed mode for message transfer.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Feb 2025 13:24:13 +0000 (15:24 +0200)]
video: tegra20: dsi: convert to video bridge UCLASS
Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
Tegra DC driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 1 Mar 2025 12:45:04 +0000 (14:45 +0200)]
video: tegra20: pwm-backlight: convert into DC child
Establish the backlight as a DC display controller child.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 1 Mar 2025 12:41:28 +0000 (14:41 +0200)]
video: tegra20: dc: support binding child devices
Implement child binding helper within DC bind to support DC PWM backlight
feature.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 1 Mar 2025 14:24:42 +0000 (16:24 +0200)]
video: tegra20: dc: remove unused video operations
Video operations are not required by the Tegra Display Controller
and should therefore be removed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sun, 23 Feb 2025 09:27:09 +0000 (11:27 +0200)]
video: tegra20: dc: get DSI/HDMI clock parent if internal DSI/HDMI is used
If device uses native Tegra DSI or HDMI, DC clock MUST use the same
parent as DSI/HDMI clock uses. Hence remove need in device tree
configuration and satisfy this condition by default.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 15 Feb 2025 17:48:44 +0000 (19:48 +0200)]
video: tegra20: dc: convert to use of_graph
Use OF graph as a main bridge/panel source, preserving
backwards compatibility with phandle implementation.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Feb 2025 13:13:01 +0000 (15:13 +0200)]
video: tegra20: dc: add video bridge support
Rework existing DC driver configuration to support bridges (both external
and internal DSI and HDMI controllers) and align video devices chain logic
with Linux implementation. Additionally, this should improve communication
between DC and internal DSI/HDMI controllers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Thu, 22 Jun 2023 17:46:00 +0000 (20:46 +0300)]
video: tegra20: provide driver support for the HDMI controller
Tegra platforms feature native HDMI support. Implement a driver to enable
functionality. This driver will initially support Tegra 2 and 3, with
future extensibility.
Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 28 Feb 2025 18:02:23 +0000 (20:02 +0200)]
video: tegra20: implement a minimal HOST1X driver for essential clock and reset setup
Introduce a simplified HOST1X driver, limited to the basic clock and reset
initialization of the bus.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tom Rini [Thu, 13 Mar 2025 03:36:52 +0000 (21:36 -0600)]
Merge tag 'u-boot-stm32-
20250312' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112
- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
Tom Rini [Wed, 12 Mar 2025 16:25:33 +0000 (10:25 -0600)]
Merge patch series "binman: build_from_git: Add argument specifying branch"
This series from Leonard Anderweit <l.anderweit@phytec.de> provides some
improvements to the binman tool and i.MX specific tooling then makes use
of it.
Link: https://lore.kernel.org/r/20250226210501.72794-1-l.anderweit@phytec.de
Leonard Anderweit [Wed, 26 Feb 2025 21:05:01 +0000 (22:05 +0100)]
binman: cst: Build from source
Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the description and add a link to documentation.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Leonard Anderweit [Wed, 26 Feb 2025 21:05:00 +0000 (22:05 +0100)]
binman: build_from_git: Add optional make path inside git repo
Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Leonard Anderweit [Wed, 26 Feb 2025 21:04:59 +0000 (22:04 +0100)]
binman: build_from_git: Add argument specifying branch
Add optional argument git_branch to build_from_git. The new argument
allows specifying which branch of the repo to use.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 12 Mar 2025 16:25:13 +0000 (10:25 -0600)]
Merge patch series "drivers: Driver support for ADI SC5xx SoCs"
Greg Malysa <malysagreg@gmail.com> says:
This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.
Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:34 +0000 (12:30 -0500)]
mmc: Add support for ADI SC5XX-family processor SDHCI peripherals
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:33 +0000 (12:30 -0500)]
spi: Add support for ADI SC5XX-family processor SPI peripherals
This adds support for the ADI-specific SPI driver present in the ADI
SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block
that uses the Cadence driver. Both may be used at once with appropriate
pin muxing configuration.
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:32 +0000 (12:30 -0500)]
remoteproc: Add in SHARC loading for ADI SC5XX-family processors
This adds the ability to load ldr-formatted files to the SHARC
coprocessors using the rproc interface. Only a minimal subset
of rproc functionality is supported: loading and starting
the remote core.
Secure boot and signed ldr verification are not available
at this time through the U-Boot interface.
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:31 +0000 (12:30 -0500)]
dma: Add driver for ADI SC5xx-family SoC MDMA functionality
Add a rudimentary MDMA driver for the Analog Devices SC5xx SoCs,
primarily intended for use with and tested against the QSPI/OSPI
IP included in the SoC.
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:30 +0000 (12:30 -0500)]
watchdog: Add support for ADI SC5XX-family watchdog peripheral
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Greg Malysa [Wed, 26 Feb 2025 17:30:29 +0000 (12:30 -0500)]
net: Add support for ADI SC5xx SoCs with DWC QoS ethernet
The ADI SC598 includes a Designware QoS 5.20a IP block. This
commit adds support for using the existing ethernet QoS driver
with the SC598 SoC.
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:28 +0000 (12:30 -0500)]
i2c: Add support for ADI SC5XX-family I2C peripheral
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:27 +0000 (12:30 -0500)]
usb: musb-new: Add support for Analog Devices SC5xx SoCs
This adds support for the MUSB-based USB controller found in the
Analog Devices SC57x and SC58x SoCs.
Co-developed-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Nathan Barrett-Morrison [Wed, 26 Feb 2025 17:30:26 +0000 (12:30 -0500)]
gpio: Add support for ADI ADP5588 GPIO expander chips
This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
<michael.hennerich@analog.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:25 +0000 (12:30 -0500)]
gpio: Add support for SC5XX-family processor GPIO driver
This adds support for using the GPIO pins on the SC5XX family of SoCs
from Analog Devices.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:24 +0000 (12:30 -0500)]
doc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl
This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:23 +0000 (12:30 -0500)]
pinctrl: Add support for ADI SC5XX-family pinctrl
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Tom Rini [Wed, 12 Mar 2025 16:24:05 +0000 (10:24 -0600)]
Merge patch series "pci_auto: Downgrade prefetch if necessary"
This series from Patrick Rudolph <patrick.rudolph@9elements.com> fixes
an issue with how we treat PCIe vs PCI in some cases and fixes the
qemu-arm-sbsa reference platform support.
Link: https://lore.kernel.org/r/20250226135647.194842-1-patrick.rudolph@9elements.com
Patrick Rudolph [Wed, 26 Feb 2025 13:56:44 +0000 (14:56 +0100)]
emulation: qemu-sbsa: Enable PCI enumeration
Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.
TEST: U-Boot logo, version, log output and the U-Boot shell is visible
on the display device.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Patrick Rudolph [Wed, 26 Feb 2025 13:56:43 +0000 (14:56 +0100)]
emulation: qemu-sbsa: Select SYS_PCI_64BIT
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Patrick Rudolph [Wed, 26 Feb 2025 13:56:42 +0000 (14:56 +0100)]
pci_auto: Downgrade prefetch if necessary
Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
prefetchable 32-bit BARs, while PCIe devices are not allowed to have
32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
typically the prefetch MMIO window is also 64-bit and placed above
4GiB, as it's the case on qemu sbsa-ref.
Currently the U-Boot code assumes that prefetchable BARs are
64-bit BARs and always tries to assign them into the prefetch
MMIO window.
When a 32-bit BAR is marked as prefetch, but the prefetch area is
not within the first 4GiB of the address space, then downgrade the
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Patrice Chotard [Thu, 30 Jan 2025 11:57:54 +0000 (12:57 +0100)]
serial: stm32: restrict _debug_uart_init() usage
Since commit
948da7773e34 ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.
So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).
It's more needed to call debug_uart_init() in stm32mp1/cpu.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Mon, 10 Mar 2025 12:52:25 +0000 (13:52 +0100)]
board: st: stm32f746-disco: Update MAINTAINERS file
Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cheick Traore [Tue, 11 Mar 2025 14:30:37 +0000 (15:30 +0100)]
ARM: dts: stm32: Add TIMERS inverted PWM channel 3 on STM32MP135F-DK
The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cheick Traore [Tue, 11 Mar 2025 14:30:36 +0000 (15:30 +0100)]
configs: stm32mp13: Enable MFD timer and PWM for stm32mp13_defconfig
Enable the following configs:
* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables support for the STM32 PWM devices
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cheick Traore [Tue, 11 Mar 2025 14:30:35 +0000 (15:30 +0100)]
pwm: stm32: add driver to support pwm with timer
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cheick Traore [Tue, 11 Mar 2025 14:30:34 +0000 (15:30 +0100)]
mach-stm32: add multifunction timer driver support
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Wed, 12 Mar 2025 13:56:16 +0000 (07:56 -0600)]
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Tom Rini [Wed, 12 Mar 2025 13:55:47 +0000 (07:55 -0600)]
Merge branch 'graph' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Tom Rini [Wed, 12 Mar 2025 01:05:03 +0000 (19:05 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
Paul Barker [Tue, 4 Mar 2025 20:07:08 +0000 (20:07 +0000)]
net: ravb: Fix RX frame size limit
The value written to the RFLR register includes the length of the CRC
data at the end of each Ethernet frame. So we need to increase the value
written to this register to ensure that we can receive full size frames.
While we're here we can also copy the improved comment from the Linux
kernel.
Fixes:
8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Tue, 4 Mar 2025 20:07:07 +0000 (20:07 +0000)]
net: ravb: Add dependency on CONFIG_BITBANGMII
The Renesas RAVB driver always requires bitbang MDIO bus support.
Fixes:
8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Tue, 4 Mar 2025 19:44:35 +0000 (19:44 +0000)]
clk: rzg2l: Ignore disable for core clocks
Following on from commit
9a699a0a0d62 ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 2 Mar 2025 01:24:52 +0000 (02:24 +0100)]
net: miiphybb: Drop mdio_init()
Inline mdio_init() back into mdio_alloc(), separate
access to mdio_init() is no longer necessary.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:51 +0000 (02:24 +0100)]
net: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_bus
These functions are no longer necessary, remove them.
The struct bb_miiphy_bus is no longer necessary either,
remove it as well.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:50 +0000 (02:24 +0100)]
arm: mvebu: a38x: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:49 +0000 (02:24 +0100)]
net: sh_eth: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes:
08eefb5e792d ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:48 +0000 (02:24 +0100)]
net: ravb: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes:
079eaca6e7b4 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:47 +0000 (02:24 +0100)]
net: designware: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes:
cbb69c2fafcc ("net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:46 +0000 (02:24 +0100)]
net: miiphybb: Drop priv from struct bb_miiphy_bus
Remove the priv member from struct bb_miiphy_bus and its assignment
from drivers. This turns struct bb_miiphy_bus int struct mii_dev
wrapper, to be cleaned up next.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:45 +0000 (02:24 +0100)]
net: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write()
Access to MDIO bus private data can be provided by both
struct mii_dev .priv member and struct bb_miiphy_bus .priv
member, use the former directly and remove .priv from the
later. Drop unused bb_miiphy_getbus(). This removes any
dependency on struct bb_miiphy_bus from the miiphybb code,
except for helper functions which will be removed later.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:44 +0000 (02:24 +0100)]
net: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write()
The access to struct bb_miiphy_bus_ops via ops pointer in
struct bb_miiphy_bus is not necessary with wrappers added
in previous patch. Pass the ops pointer directly to both
bb_miiphy_read() and bb_miiphy_write() functions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:43 +0000 (02:24 +0100)]
net: miiphybb: Wrap driver side bb_miiphy_read/write() accessors
Do not call bb_miiphy_read()/bb_miiphy_write() accessors directly
in drivers, instead call them through wrapper functions. Those are
meant to be used as function parameter adaptation layer between
struct mii_dev callback function parameters and what the miiphybb
does expect and will soon expect. This is a preparatory patch, no
functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:42 +0000 (02:24 +0100)]
net: miiphybb: Split off struct bb_miiphy_bus_ops
Move miiphybb operations into separate struct bb_miiphy_bus_ops
structure, add pointer to struct bb_miiphy_bus_ops into the base
struct bb_miiphy_bus and access the ops through this pointer in
miiphybb generic code. The variable reshuffling in miiphybb.c
cannot be easily avoided.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Fri, 28 Feb 2025 12:02:52 +0000 (13:02 +0100)]
pinctrl: renesas: Drop special RZN1 entry from Makefile
The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.
Fixes:
e4aea57fa773 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 9 Feb 2025 15:05:16 +0000 (16:05 +0100)]
ARM: renesas: Enable USBHS UDC and UMS on Renesas R-Car Gen3 Salvator-X(S)
The Renesas R-Car Gen3 Salvator-X(S) boards contain USB micro-B port
on which the USBHS controller is accessible. Enable the USBHS UDC
driver to make this port usable, enable UMS USB Mass Storage support
to make it possible to expose block devices as USB Mass Storage to
Host PC.
The USB VID/PID is picked from R-Car Series, 3rd Generation reference
manual Rev.2.00 chapter 19.2.8 USB download mode, and matches R-Car H3
BootROM USB download mode VID/PID.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:47:02 +0000 (19:47 +0200)]
configs: qc750: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:39:55 +0000 (19:39 +0200)]
configs: x3_t30: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:39:27 +0000 (19:39 +0200)]
configs: picasso: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:38:17 +0000 (19:38 +0200)]
configs: grouper: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:37:39 +0000 (19:37 +0200)]
configs: endeavoru: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 11 Mar 2025 17:37:08 +0000 (19:37 +0200)]
configs: transformer: add 3 second delay before power off
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Wed, 5 Mar 2025 10:19:20 +0000 (12:19 +0200)]
ARM: tegra20: mark second DC with bootph-all
For the Tegra 2, similar to other Tegra SoC generations, 'bootph-all'
must be applied to both display controllers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Jonas Schwöbel [Tue, 4 Mar 2025 07:02:11 +0000 (09:02 +0200)]
ARM: tegra: clock: fix PLLD/PLLD2 related clock calculations
While PLLD/D2 is the nominal parent clock, all derived clocks are generated
from its single output, plld_out0, which is PLLD/D2 divided by two. Direct
use of PLLD/D2 is absent in peripheral clock configurations. Therefore,
clock derivation formulas must take in account this division.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Jonas Schwöbel [Mon, 3 Mar 2025 11:31:07 +0000 (13:31 +0200)]
common: edid: update timing selection logic
Older EDID timing algorithms relied solely on detailed timings, typically
optimized for a display's native resolution. This caused issues with newer
4K panels on older hardware, which couldn't handle those high resolutions.
To address this, the algorithm now also considers standard timings, offering
lower, compatible resolutions. Future improvements may include checking
established timings for even broader compatibility.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Sat, 16 Nov 2024 12:33:47 +0000 (14:33 +0200)]
board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of
internal memory that can be supplemented with a microSDXC card giving up to
128 GB of additional storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tom Rini [Tue, 11 Mar 2025 14:57:33 +0000 (08:57 -0600)]
Merge tag 'net-next-
20250310' of https://source.denx.de/u-boot/custodians/u-boot-net into next
Pull request net-next-
20250310.
CI:
* https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25084
net-lwip:
* Add support for CA (root) certificates to HTTPS
* Add CONFIG_LWIP_DEBUG_RXTX to trace in/out messages
Jerome Forissier [Wed, 5 Mar 2025 14:26:47 +0000 (15:26 +0100)]
configs: qemu_arm64_lwip_defconfig: enable WGET_CACERT
Enable the "wget cacert" command.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>