Hector Martin [Sun, 20 Apr 2025 11:58:06 +0000 (13:58 +0200)]
arm: apple: rtkit: Add OSLog buffer support
This will work for u-boot itself, but needs a special workaround in the
MTP driver for Linux handoff to work.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Hector Martin [Sun, 20 Apr 2025 11:58:05 +0000 (13:58 +0200)]
arm: apple: rtkit: Add a generic RTKit helper driver
This driver handles the MTP ASC coprocessor, which does not need any
special handling on the RTKit side and communicates out-of-band.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Hector Martin [Sun, 20 Apr 2025 11:58:04 +0000 (13:58 +0200)]
arm: apple: rtkit: Add default buffer handlers
For devices without specific buffer methods, just assume we can give
them raw memory pointers when they request a buffer.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Hector Martin [Sun, 20 Apr 2025 11:58:03 +0000 (13:58 +0200)]
arm: apple: rtkit: Add support for AP power & syslogs
This is required for MTP to work properly
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tom Rini [Sun, 20 Apr 2025 13:52:47 +0000 (07:52 -0600)]
Merge tag 'efi-2025-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-07-rc1-2
Documentation:
* dt_qemu: correct dumpdtb description
* release_cycle: Use variable substitution for next version
UEFI:
* cmd: simplify eficonfig_init()
* efi_selftest: check executing in EL2
* efi_selftest: use do_bootefi_exec()
Others:
* riscv: dts: jh7110: add bootph-pre-ram for &pllclk
* mips: malta: set MIPS_RELOCATION_TABLE_SIZE=0xc000
Heinrich Schuchardt [Sun, 3 Nov 2024 19:01:13 +0000 (20:01 +0100)]
mips: malta: set MIPS_RELOCATION_TABLE_SIZE=0xc000
MIPS_RELOCATION_TABLE_SIZE=0x8000 is too small to enable UNIT_TEST.
Increase it by 50 % (16 KiB).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 30 Mar 2025 16:24:21 +0000 (18:24 +0200)]
riscv: dts: jh7110: add bootph-pre-ram for &pllclk
Since commit
f98cd471f06b ("clk: clk-composite: Resolve parent clock by
name") the StarFive VisionFive 2 board fails to boot.
Before that patch the SPL debug UART showed warnings like:
clk_register: failed to get pll0_out device (parent of perh_root)
clk_register: failed to get pll0_out device (parent of qspi_ref_src)
clk_register: failed to get pll0_out device (parent of usb_125m)
clk_register: failed to get pll0_out device (parent of gmac_src)
clk_register: failed to get pll0_out device (parent of gmac1_gtxclk)
clk_register: failed to get pll0_out device (parent of gmac0_gtxclk)
The &pllclk clock needs to be enabled early.
Fixes:
f98cd471f06b ("clk: clk-composite: Resolve parent clock by name")
Suggested-by: Marek Vasut <marex@denx.de>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Wed, 16 Apr 2025 06:44:29 +0000 (08:44 +0200)]
doc: dt_qemu: correct dumpdtb description
Use only a single -machine parameter.
Describe that the same invocation of qemu-system-<arch> has to be
used for dumping the device-tree as will be used when executing U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Fri, 11 Apr 2025 05:36:45 +0000 (07:36 +0200)]
efi_selftest: use do_bootefi_exec()
The EFI selftest should match executing a real EFI binary
as closely as possible.
Use do_bootefi_exec() to enter the EFI selftest.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Fri, 11 Apr 2025 05:32:56 +0000 (07:32 +0200)]
efi_selftest: check executing in EL2
UEFI binaries should be executed in EL2 or EL1 even if U-Boot is started
in EL3. Provide a unit test.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Tue, 8 Apr 2025 13:54:21 +0000 (07:54 -0600)]
doc: release_cycle: Use variable substitution for next version
To avoid the problem fixed in commit
57a95d522ca8 ("doc: release_cycle:
fix next release version") moving forward, make use of the variable
substitution feature of rST. This adds a next_ver variable and
references it in all of the places where I had been listing the version
being worked on.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Heinrich Schuchardt [Mon, 10 Mar 2025 06:13:43 +0000 (07:13 +0100)]
cmd: simplify eficonfig_init()
As the system table already has pointers to the Simple Text Input and
Output Protocols we can directly use these instead of calling
OpenProtocol.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Wadim Egorov [Thu, 17 Apr 2025 11:53:11 +0000 (13:53 +0200)]
Revert "power-domain: Add refcounting"
Unfortunately this change breaks boot on K3 platform.
U-Boot will hang after:
U-Boot SPL 2025.04-01050-ga40fc5afaec0 (Apr 14 2025 - 07:31:32 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
This reverts commit
197376fbf300e92afa0a1583815d9c9eb52d613a as
suggested in [1].
[1] https://lists.denx.de/pipermail/u-boot/2025-April/587032.html
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Bryan Brattlof [Fri, 11 Apr 2025 22:48:39 +0000 (17:48 -0500)]
configs: am65x_evm_a53: convert to a standard boot flow
Rather than maintaining custom hush scripting to boot the SDK, migrate
to a 'standard boot' method which simplifies maintenance and enables
multiple distributions to use this evaluation module.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Parth Pancholi [Tue, 8 Apr 2025 16:12:11 +0000 (18:12 +0200)]
arm: mach-k3: am62px: Fix MCU_CLKOUT0 parent clock mux
CU_CLKOUT0 can be driven by two input clocks: a 25 MHz and a 50 MHz source.
Currently, the 25 MHz option is not selectable due to an incorrect mux
configuration where the 50 MHz clock is duplicated in the parent list.
This patch fixes the mux setup, allowing proper selection of the 25 MHz
clock source for MCU_CLKOUT0.
Similar configuration is already correctly implemented in AM62 clock
data for 'hsdiv4_16fft_main_2_hsdivout1_clk10', where MCU_CLKOUT0
parent switching behaves as expected.
Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62px/clocks.html#clocks-for-board0-device
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Tom Rini [Thu, 17 Apr 2025 13:52:02 +0000 (07:52 -0600)]
Merge tag 'xilinx-for-v2025.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.07-rc1
AMD/Xilinx:
- Synchronize enums around tcm_mode
- Access bootmode registers via firmware interface
- Setup default values for DEBUG_UART
- Fix dfu alt buffer clearing
- Convert loadpdi command to fpga
- Fix board detection code
- Minor defconfig updates
Versal:
- Wire multi_boot register
Versal Gen 2:
- Enable missing drivers
- Wire i2c FRU decoding at start
- Wire saving variables to different locations
- Disable default DEBUG_UART
- Wire USB/UFS boot and fix access via firmware interface
- Minor fixes
ZynqMP/Kria:
- Enable mkfwumdata
- Topic board update
- Enhance binman configurations
- Kria usb update
BuR:
- Add multiple Zynq based boards
cadence_ospi:
- Enable device reset
fpga:
- Add support for loading bitstream for Altera SoCs
Tom Rini [Wed, 16 Apr 2025 22:52:28 +0000 (16:52 -0600)]
Merge patch series "airoha: add support spi/mmc/ethernet"
Christian Marangi <ansuelsmth@gmail.com> says:
This is continuation of the initial patchset for airoha
support.
Some are trivial fix for spi.
A new concept to setup SPI from detected NAND.
Sadly DTS node still need to be merged upstream so we
are currently adding them to u-boot dtsi and it's planned
to be dropped once they are accepted in upstream kernel.
Link: https://lore.kernel.org/r/20250407200208.25594-1-ansuelsmth@gmail.com
Christian Marangi [Mon, 7 Apr 2025 20:01:58 +0000 (22:01 +0200)]
configs: airoha: an7581_evb: Enable Airoha SNFI SPI config
Enable Airoha SNFI SPI config to enable support for SNAND flash.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:57 +0000 (22:01 +0200)]
arm: dts: an7581: Add SNAND node
Add SNAND node to Airoha AN7581 EVB DTS to enable support for attached
SNAND flash.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:56 +0000 (22:01 +0200)]
spi: airoha: Add Airoha SPI NAND driver
Add Airoha SPI NAND driver to permit usage of attached SNAND on the
Airoha AN7581 SoC. While SPI controller supports DMA transation, due to
U-Boot limitation we currently limit it to single command in Manual
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:55 +0000 (22:01 +0200)]
spinand: call SPI setup_for_spinand if supported
Call SPI setup_for_spinand() if supported and defined to configure the
SPI slave for the attached NAND. This is needed to configure the SPI
with the NAND page size and spare size for correct configuration of the
device.
Call it as soon as the NAND is detected to correctly handle SPI
controller with select_op_variant detection.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:54 +0000 (22:01 +0200)]
spi: Introduce setup_for_spinand()
A common device attached to SPI are SPI NAND and some device might
require to have info on the attached NAND to know the flash page size
and spare size.
To support this, introduce setup_for_spinand() that pass the attached
spinand info from manufacturer.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[trini: Switch to forward declaration of struct spinand_info]
Signed-off-by: Tom Rini <trini@konsulko.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:53 +0000 (22:01 +0200)]
spi: drop unneeded spi.h header include from spinand.h
Drop unneeded spi.h header include from spinand.h, nothing included by
spi.h is actually used in this header and .c should correctly included
spi.h if actually needed.
Replace spi.h with linux/bitops.h as this is what is actually required
for spinand.h
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:52 +0000 (22:01 +0200)]
regmap: Add regmap_set/clear_bits shorthands
Port Linux kernel regmap_set/clear_bits shorthands to set and clear bits
in a regmap. These are handy if only specific bits needs to be applied
or cleared and makes it easier to port regmap based driver from kernel
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:51 +0000 (22:01 +0200)]
airoha: Add eMMC config to defconfig
Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support
for it in default images.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:50 +0000 (22:01 +0200)]
arch: arm: dts: an7581: Add eMMC nodes
Add eMMC nodes with the fixed regulator and fixed clock. It's also
needed to assign the clock and set it to 200MHz as it's set to 150Mhz by
default.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:49 +0000 (22:01 +0200)]
mmc: mediatek: permit to also build for Airoha arch
Airoha new SoC implement the same Mediatek driver for MMC. Permit to
also build for Airoha arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:48 +0000 (22:01 +0200)]
arch: arm: dts: an7581: Add Ethernet nodes
Add Ethrnet nodes for Airoha AN7581 EVB board.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:47 +0000 (22:01 +0200)]
airoha: Add Ethernet config to defconfig
Add Ethrnet config to defconfig to enable Ethernet support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:46 +0000 (22:01 +0200)]
net: airoha: Add Airoha Ethernet driver
Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly
rewritten and simplified version of the Linux airoha_eth.c driver.
It's has been modified to support a single RX/TX ring to reflect U-Boot
implementation with recv and send API.
The struct and the define are kept as similar as possible to upstream
one to not diverge too much.
The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x
but doesn't require any modification aside from setting the CPU port and
applying the Flood configuration hence it can be handled entirely in the
Ethernet driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Christian Marangi [Mon, 7 Apr 2025 20:01:45 +0000 (22:01 +0200)]
arch: arm: dts: an7581: add Chip SCU node
Add pending Chip SCU node for clock node.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Lucien.Jheng [Sun, 6 Apr 2025 13:02:44 +0000 (21:02 +0800)]
net: phy: Add the Airoha EN8811H PHY driver
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.
The driver uses two firmware files, for which updated versions are added to
linux-firmware already.
Based on the Linux upstream 8811 driver code(air_en8811h.c),
I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.
The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini,
and it is loaded from there.
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Tom Rini [Wed, 16 Apr 2025 14:12:30 +0000 (08:12 -0600)]
Merge tag 'u-boot-marvell-
20250516' of https://source.denx.de/u-boot/custodians/u-boot-marvell
CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=390&view=results
- mvebu_espressobin_ultra-88f3720_defconfig: disable SATA
- helios4: enable ddr odt0 on write for both chip-select
- clearfog,helios4: disable sdhci sdma
- mvebu/bubt: Correct usage of IS_ENABLED() macro
- mvebu: Correct SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR usage
Bernhard Messerklinger [Fri, 4 Apr 2025 07:28:00 +0000 (09:28 +0200)]
board/BuR/zynq: initial commit
This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170
boards. This boards are based on the Xilinx Zynq SoC.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250404072819.69642-5-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Bernhard Messerklinger [Fri, 4 Apr 2025 07:27:59 +0000 (09:27 +0200)]
board/BuR/common: split br_resetc_bmode function
Split br_resetc_bmode function to add support for reading of reset
reason in board code with br_resetc_bmode_get.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-4-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Bernhard Messerklinger [Fri, 4 Apr 2025 07:27:58 +0000 (09:27 +0200)]
board/BuR/common: add parameter for reset controller I2C bus selection
Normally B&R reset controllers are located at I2C bus 0. This patch adds
the possibility to change this bus number with the kconfig option
BR_RESETC_I2CBUS.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-3-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Bernhard Messerklinger [Fri, 4 Apr 2025 07:27:57 +0000 (09:27 +0200)]
board/BuR/common: use strlcpy instead of strncpy
Now strlcpy is used to copy the defip string to the corresponding
environment variable. This preserves memory for the NULL termination.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-2-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Padmarao Begari [Wed, 9 Apr 2025 16:26:39 +0000 (21:56 +0530)]
board: amd: Read an eeprom after relocation
Read an eeprom after relocation which also shows information from
eeprom wired via nvmem aliases.
When DTB reselection is enabled eeprom is read before relocation
too but information is not showed. The issue about two i2c reads
in this case will be address separately.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162639.588487-3-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Padmarao Begari [Wed, 9 Apr 2025 16:26:38 +0000 (21:56 +0530)]
arm64: versal2: Remove dtb reselect and multi dtb
Presently the multi dtb's are not using on versal Gen 2
platform, so remove CONFIG_DTB_RESELECT and CONFIG_MULTI_DTB_FIT
from defconfig.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162639.588487-2-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Padmarao Begari [Wed, 9 Apr 2025 16:25:53 +0000 (21:55 +0530)]
board: xilinx: Store board info data in data section
Line 171 in README is describing that before relocation no code
should use global variable because global variables are placed
to BSS section which is initialized to 0 after relocation.
In the case of ZynqMP, where DTB reselection is enabled, the EEPROM
is read again after relocation. This prevents the issue from being
observed. However, in Versal Gen 2, where DTB reselection is also
enabled, the EEPROM is not read after relocation because it is not
yet wired in board_init(). This leads to a situation where the code
accesses an incorrect memory location, because none is really
checking the board_info is valid or not. To fix, move the board_info
into the data section and also check whether it is valid or not.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162553.588285-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Fri, 11 Apr 2025 15:46:12 +0000 (21:16 +0530)]
amd: versal2: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal Gen 2 platform.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250411154612.107136-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Thu, 10 Apr 2025 09:25:28 +0000 (14:55 +0530)]
arm64: versal2: Update the number of DRAM banks to 36
HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250410092528.3713904-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Thu, 10 Apr 2025 08:30:55 +0000 (10:30 +0200)]
arm64: versal2: Add usb distro boot command
Adding support for the usb distro boot command.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/121b6879efde0b83d3933852442895631c4cb24f.1744273853.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 10 Apr 2025 08:30:54 +0000 (10:30 +0200)]
arm64: versal2: Add ufs distro boot command
Adding support for the ufs distro boot command.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c0e6737ae4119963afc8ea19b49b998a013d06c4.1744273853.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 10 Apr 2025 08:14:04 +0000 (10:14 +0200)]
arm64: zynqmp: Start usb automatically via preboot on Kria
U-Boot configures the USB config object which enables power for
the IP, without this the linux usb driver won't work.
So add "usb start" as part of preboot command.
Fixes:
dd4a82201694 ("arm64: zynqmp: Introduce kria SOM defconfig")
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/180c9776b03d57d8218d161924363906ef354394.1744272843.git.michal.simek@amd.com
Michal Simek [Thu, 10 Apr 2025 07:38:51 +0000 (09:38 +0200)]
xilinx: Free memory when variable is saved in boot_targets_setup()
When boot_targets variable is saved there is no reason to keep string in
malloc area that's why free it. This change is already done in ZynqMP code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa10fc22193a1a23258466056b3d02f7496fccfe.1744270729.git.michal.simek@amd.com
Michal Simek [Thu, 10 Apr 2025 07:38:20 +0000 (09:38 +0200)]
xilinx: Remove UARTLITE from defconfigs
Remove uartlite serial driver from defconfigs because is not tested or used
on ARM based platform as console.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86b100692101089dd8d9a8eed45461e8855384bc.1744270698.git.michal.simek@amd.com
Michal Simek [Thu, 10 Apr 2025 07:37:28 +0000 (09:37 +0200)]
amd: versal2: Enable NVMEM framework
Enable NVMEM framework to be able to for example read MAC address from
eeprom. For more information please look at commit
5db5b7e2a336 ("xilinx:
Enable NVMEM framework for all platforms").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b6714165aee393528812ddbfc3cd18a3bbcf202e.1744270647.git.michal.simek@amd.com
Michal Simek [Thu, 10 Apr 2025 07:35:36 +0000 (09:35 +0200)]
amd: versal2: Enable SMBIOS command
Enabel SMBIOS command as was done by commit
aa815e6c7603 ("xilinx: Enable
SMBIOS command") for our other platforms.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c1e236003c6ec250dbcc5178c873c171fffccd29.1744270535.git.michal.simek@amd.com
Michal Simek [Mon, 7 Apr 2025 15:17:30 +0000 (17:17 +0200)]
arm64: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME in binman
u-boot.itb name is coming via CONFIG_SPL_FS_LOAD_PAYLOAD_NAME and it's
change will affect SD boot mode that's why start to use it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0f037e62e2d8486c0f68f204b45705be9e996ba7.1744039048.git.michal.simek@amd.com
Padmarao Begari [Mon, 7 Apr 2025 13:45:44 +0000 (19:15 +0530)]
configs: versal: Fix initial stack pointer
The mini u-boot is getting exception because of an initial
stack pointer address is used at near the top of memory,
and while executing u-boot is assigned pre-malloc and
global_data memory after initial stack pointer and updated
the stack pointer. Serial driver is used pre-malloc area
for serial operations before relocation. But pre-malloc area
is cleared while doing BSS at relocation time. The u-boot is
called board_init() function and doing printf, relocation serial
driver is not initialized yet, so it is using before relocation
serial operations but it is cleared by BSS and got the exception.
To fix, change an initial stack pointer address from near the
top of memory to near the relocation memory.
Fixes:
685874939a5e ("configs: versal: update initial stack pointer")
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407134544.3951763-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Prasad Kummari [Thu, 27 Mar 2025 10:52:00 +0000 (16:22 +0530)]
xilinx: versal: remove versal loadpdi command
The source code for the versal loadpdi command and the
CONFIG_CMD_VERSAL configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-4-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Prasad Kummari [Thu, 27 Mar 2025 10:51:59 +0000 (16:21 +0530)]
arm64: versal2: Add PL bit stream load support
Add support for loading the secure & non-secure pdi images and PL
bitstream on the Versal Gen2 platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal Gen2 device.
PDI is the new programmable device image format for Versal Gen2,
and the bitstream for the Versal Gen2 platform is generated exclusively
in this format.
With the enhanced SMC format in TF-A ensuring transparent payload
forwarding for Versal Gen2, the u-boot driver must now handle the
word swapping of PDI address that was previously done in TF-A for
this API. The source code for the Versal2 loadpdi command and the
CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Prasad Kummari [Thu, 27 Mar 2025 10:51:58 +0000 (16:21 +0530)]
arm64: versal-net: Add PL bit stream load support
Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.
The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Muhammad Hazim Izzat Zamri [Fri, 14 Mar 2025 02:19:53 +0000 (19:19 -0700)]
drivers: fpga: Follow mainline to pass compatible flags to fpga_load
Introducing additional flag to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Generally, flag variable is used to enable or disable certain features,
specify additional parameters (such as error handling), or modify how
the function operates.
Hence, in this function flags is an integer that can be used to pass
configuration options to the fpga_load function. Here, it's
initialized to 0, meaning no special options are enabled, but it could
modify the flags to influence the function's behavior.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-3-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Muhammad Hazim Izzat Zamri [Fri, 14 Mar 2025 02:19:52 +0000 (19:19 -0700)]
drivers: fpga: Add FPGA configuration during bootm for Intel SOCFPGA
Enabling the capability to automatically perform FPGA configuration
when booting Linux FIT image via bootm command. The FPGA
configuration bitstream shall be packed within the FIT image.
The FPGA data (full or partial) is checked by the SDM hardware,
for Intel SDM Mailbox based devices. Hence always return full
bitstream.
Second function is to enable the HPS to FPGA bridges when FPGA load
is completed successfully. This is to ensure the FPGA is accessible
by the HPS.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-2-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Vincent Stehlé [Mon, 7 Apr 2025 17:05:29 +0000 (19:05 +0200)]
arm64: zynqmp: fix dfu alt buffer clearing
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes:
b86f43de0be0 ("xilinx: zynqmp: Add support for runtime dfu_alt_info setup")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-6-vincent.stehle@arm.com
Vincent Stehlé [Mon, 7 Apr 2025 17:05:28 +0000 (19:05 +0200)]
xilinx: zynq: fix dfu alt buffer clearing
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes:
c67fecd2125b ("ARM: zynq: Enable capsule update for qspi and mmc")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-5-vincent.stehle@arm.com
Vincent Stehlé [Mon, 7 Apr 2025 17:05:27 +0000 (19:05 +0200)]
arm64: versal: fix dfu alt buffer clearing
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes:
064c8978b44f ("arm64: versal: Enable capsule update (SD)")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-4-vincent.stehle@arm.com
Venkatesh Yadav Abbarapu [Thu, 20 Mar 2025 09:05:00 +0000 (10:05 +0100)]
arm64: versal2: Update the text base and dtb address
Update the TEXT_BASE and DTB address as per the new memory map.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3ffb6f1f7ff418f01ccc2eccf8a834441f9f0b74.1742461498.git.michal.simek@amd.com
Michal Simek [Thu, 20 Mar 2025 08:43:53 +0000 (09:43 +0100)]
arm64: versal2: Disable DEBUG uart for mini configurations
There is no reason to enable DEBUG uart used for early debugging by default
that's why disable it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff61ec2fc213bb3a9640015c6588e9b48ae38967.1742460228.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 20 Mar 2025 09:13:24 +0000 (10:13 +0100)]
ufs: amd-versal2: Use raw read/write for SLCR/CACHE registers
Update the firmware driver UFS APIs zynqmp_pm_ufs_* to directly
read/write to the pmc_iou_slcr and efuse_cache registers. Replace
these raw reads/writes with the xilinx_pm_request() API with the
correct arguments once the PM related changes are done.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ee2d1ad2e07e96f1948ab6ffe8f3c50a3b8f9be9.1742462001.git.michal.simek@amd.com
Michal Simek [Thu, 13 Mar 2025 12:28:48 +0000 (13:28 +0100)]
arm64: versal2: Disable debug console
Platforms can use uart0, uart1, dcc or even any other console that's why
disable debug console. It should be used for debugging purpose only.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa122482cf5b32ded4497469cac1829c6944f0fa.1741868926.git.michal.simek@amd.com
Michal Simek [Thu, 13 Mar 2025 12:23:46 +0000 (13:23 +0100)]
serial: Setup default base and frequency for Versal platforms
Add useful default debug uart values for all Versal platforms to simplify
and speed up debug uart enabling.
The similar change has been done for Zynq/ZynqMP by commit
ad55d99e3cc3
("serial: Setup serial base and freq for zynq/zynqmp").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86edf3dbb6de16337aac36f5121f306f83149fc0.1741868624.git.michal.simek@amd.com
Mike Looijmans [Wed, 12 Mar 2025 15:36:32 +0000 (16:36 +0100)]
topic: Use distro_boot for topic-miami boards
Adjust configuration and devicetree so the topic-miami board actually
boots.
Replace the custom scripting and just use distro_boot. Override the
standard zynq routines.
The board attempts to boot from SD card first, and falls back to booting
UBIFS from the QSPI NOR flash.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lore.kernel.org/r/20250312153741.24007-2-mike.looijmans@topic.nl
Signed-off-by: Michal Simek <michal.simek@amd.com>
Mike Looijmans [Wed, 12 Mar 2025 15:36:31 +0000 (16:36 +0100)]
xilinx: Allow alternative boot strategies in zynq-common.h
Allow config headers that include zynq-common.h to provide their own
(distro) boot strategies. This is implemented by skipping the section
when BOOT_ENV has already been defined.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lore.kernel.org/r/20250312153741.24007-1-mike.looijmans@topic.nl
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Tue, 11 Mar 2025 04:13:17 +0000 (09:43 +0530)]
spi: cadence_ospi: Add device reset via OSPI controller
Add support for flash device reset via OSPI controller
instead of using GPIO, as OSPI IP has device reset
feature on Versal Gen2 platform. Also add compatible
string for Versal Gen2 platform.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250311041317.2992862-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Prasad Kummari [Wed, 5 Mar 2025 13:48:46 +0000 (19:18 +0530)]
xilinx: versal: add firmware access to PMC multi Boot mode register
Added extended support for retrieving the PMC muti boot mode
register via the firmware interface, which is preferred when
U-Boot runs in EL2 and cannot directly access PMC registers
via raw reads. Ideally, all secure registers should be accessed
via xilinx_pm_request(). Introduced the secure
zynqmp_pm_get_pmc_multi_boot_reg() call, which uses
xilinx_pm_request() to read the PMC multi boot mode register.
BootROM increments the MultiBoot register (PMC_MULTI_BOOT) read
address offset by 32 KB and retries. For SD and eMMC boot modes,
it can search up to 8191 FAT files for the identification string.
A 13-bit mask (0x1FFF) is applied to PMC_MULTI_BOOT_MASK to obtain
the correct values in BootROM.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250305134845.3182193-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Tue, 25 Feb 2025 03:28:06 +0000 (15:28 -1200)]
amd: versal2: Add the UFS boot mode support
Add the UFS boot mode support and update the boot_targets with
ufs mode. If the UFS device is not accessible from APU and
running this is detected as a warning, as the device is not
accessible.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250225032806.1842581-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Tue, 18 Feb 2025 12:40:48 +0000 (13:40 +0100)]
versal2: Fix .*get_bootmode function name
Function was c&p from Versal NET and should use soc specific name instead.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bd8cb2f9783bda47663927f78bf0bf908393334b.1739882445.git.michal.simek@amd.com
Prasad Kummari [Wed, 19 Feb 2025 11:53:01 +0000 (17:23 +0530)]
xilinx: versal: add firmware access to CRP Boot mode register
Added extended support for retrieving the boot mode register
via the firmware interface, which is preferred when U-Boot
runs in EL2 and cannot directly access CRP registers via raw
reads. Ideally, all secure registers should be accessed via
xilinx_pm_request(). Introduced the secure zynqmp_pm_get_bootmode_reg()
call, which uses xilinx_pm_request() to read the boot mode register.
When CONFIG_ZYNQMP_FIRMWARE is enabled, the secure
zynqmp_pm_get_bootmode_reg() call is used; otherwise,
direct raw reads are performed in the case of mini U-Boot.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250219115301.3661036-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Marek Vasut [Thu, 6 Feb 2025 21:29:36 +0000 (22:29 +0100)]
arm64: zynqmp: versal: Consistently use enum tcm_mode
Turn anonymous enum TCM_LOCK/TCM_SPLIT into enum tcm_mode {}, set
TCM_LOCK as 0 and TCM_SPLIT as 1 to match LOCK and SPLIT macros in
mach-zynqmp/mp.c, and unify all the functions and their parameters
on this one single enum tcm_mode {} instead of a mix of bool and u8.
No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20250206213039.42756-1-marex@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Fri, 7 Feb 2025 06:43:50 +0000 (07:43 +0100)]
xilinx: Enable mkfwumdata tool for a/b update for Kria
Build mkfwumdata tool by default for building ab mdata structure.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/641e7759275cfe673ffcee2000a6c34224f0c5d5.1738910629.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 6 Feb 2025 11:01:52 +0000 (16:31 +0530)]
amd: versal2: Enable reset and power domain drivers
Enable power domain driver to request node for all the IP's that are
enabled in DT. Add CONFIG_RESET_ZYNQMP config in versal2 default
configuration to enable support for reset driver for versal2
platform.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250206110152.1532673-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Sat, 15 Mar 2025 01:29:05 +0000 (19:29 -0600)]
ARM: mvebu: Correct SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR usage
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. However, it also works as intended
because SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is the default option
within that choice statement. To guard against future regressions, make
the choice statement in common/spl/Kconfig have an explicit default if
MVEBU_SPL_BOOT_DEVICE_MMC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Benjamin Schneider [Fri, 28 Feb 2025 19:22:10 +0000 (11:22 -0800)]
configs: mvebu_espressobin_ultra-88f3720_defconfig: disable SATA
This device uses the SCSI subsystem to interface with SATA devices.
Trying to use the sata command results in an unhandled exception.
This has the side effect of also causing bootflow scan to raise
an unhandled exception when it attempts to probe the SATA
subsystem. Disabling the sata command fixes this issue and does
not remove support for any boot devices.
Signed-off-by: Benjamin Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <sr@denx.de>
Chris Packham [Wed, 26 Feb 2025 23:07:04 +0000 (12:07 +1300)]
arm: mvebu: Fix typos in Kconfig help text
Fix a couple of typos in mach-mvebu/Kconfig.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 26 Feb 2025 20:31:18 +0000 (14:31 -0600)]
cmd: mvebu/bubt: Correct usage of IS_ENABLED() macro
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Josua Mayer [Sat, 8 Feb 2025 12:22:43 +0000 (13:22 +0100)]
configs: clearfog,helios4: disable sdhci sdma
Testing has shown that loading large initramfs causes data corruption
where the kernel image had been loaded to.
Debian 12 installation using a 17M initramfs boots fine, but the final
system with an initramfs of 27M obscurely fails to boot with bootz
reporting "Bad magic!".
Inspecting kernel_addr_r after this failed boot attempt does show
garbage in place of the expected zimage header.
The problem seems to occur on armada 388 only when sdhci sdma is enabled
in defconfig. Other armada boards such as turris omnia did not enable
the option.
Remove sdhci sdma from defconfig for now as a workaround.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Josua Mayer [Fri, 7 Feb 2025 15:06:08 +0000 (16:06 +0100)]
board: kobol: helios4: enable ddr odt0 on write for both chip-select
Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.
Enable ODT[0] for both chip-select during write only.
See also commit
d09f199097d3 ("board: solidrun: clearfog: enable ddr odt0
on write for both chip-select") where this was added to SolidRun
Clearfog board which is using the same System on Module but unlike
Helios-4 without ECC memory.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Casey Connolly [Tue, 15 Apr 2025 16:24:08 +0000 (18:24 +0200)]
mailmap: update my name and email
Update my name and email address
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
yan wang [Thu, 10 Apr 2025 09:28:50 +0000 (11:28 +0200)]
spin_table: add missing header for ENODEV and ENOSPC symbols
Add the necessary header as <common.h> is removed
Signed-off-by: yan wang <yan.wang@softathome.com>
Udit Kumar [Thu, 10 Apr 2025 13:27:46 +0000 (18:57 +0530)]
doc: board: ti: Add optee rng support
J722S has hw rng, which can be used by OPTEE.
So remove option to use SW TRNG by OPTEE.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Tom Rini [Fri, 11 Apr 2025 17:04:06 +0000 (11:04 -0600)]
buildman: Update to grabbing gcc-14.2.0 toolchains by default
With the switch to using GCC 14.2.0 in commit
001bac5f16ad ("Dockerfile:
Update to gcc-14.2.0 and clang-18") in CI, we should make buildman match
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Primoz Fiser [Tue, 8 Apr 2025 07:17:10 +0000 (09:17 +0200)]
board: phytec: common: Fix phytec_get_product_name()
Currently, phytec_get_product_name() function only takes care of PCM
SoM type, however in case of PCL, KSM or KSP SoM type it will return
error:
phytec_get_product_name: Invalid SOM type
Add support for other SoM types as defined in phytec_som_type_str enum
(see phytec_som_detection.h) to get rid of the error.
While at it, also simplify switch case statements by grouping them
together. This makes it more concise and readable.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Jesse Taube [Wed, 9 Apr 2025 18:08:33 +0000 (14:08 -0400)]
common: Add CONFIG_SKIP_RELOCATE
Add a check for CONFIG_SKIP_RELOCATE in reserve_uboot to skip the
relocation of the U-Boot image.
CONFIG_SKIP_RELOCATE skips relocation of U-Boot to the end of RAM
allowing for systems that have extremely limited RAM to run U-Boot.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Bryan Brattlof [Wed, 9 Apr 2025 18:25:00 +0000 (13:25 -0500)]
arm: mach-k3: am62ax: fix MCU_CLKOUT0 parent clock mux
Much like what was fixed on the AM62x and AM62Px platforms[0]. The
CU_CLKOUT0 has two (25mhz and 50mhz) mux options however the clock
structure incorrectly duplicated the first 50mhz option twice. Fix this
for the AM62A platforms so the 25mhz option is selectable.
[0] https://lore.kernel.org/all/
20250408161211.3165588-1-parth105105@gmail.com/
Reported-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Parvathi Pudi [Thu, 10 Apr 2025 06:59:55 +0000 (12:29 +0530)]
include: configs: Adds support for AM335x ICE PRUSS mode
On the AM3359 ICE we have two modes of operation CPSW mode or PRU-ICSS
mode.
For PRU-ICSS mode, connect Pin2 and Pin3 of J18 and J19 and for CPSW mode,
connect Pin1 and Pin2 of J18 and J19.
This patch adds support for PRUSS mode boot strapping from uboot.
Co-developed-by: Basharath Hussain Khaja <basharath@couthit.com>
Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
Tom Rini [Tue, 15 Apr 2025 13:36:25 +0000 (07:36 -0600)]
Merge tag 'tpm-master-
14042025' of https://source.denx.de/u-boot/custodians/u-boot-tpm
A small fix for the cr50 which is a TPM but doesn't support all
the TPM functionality. Since it deviates from our normal TIS compliant
TPMs it can't be started twice since running the selftests twice hangs.
Nishanth Menon [Mon, 7 Apr 2025 12:15:54 +0000 (07:15 -0500)]
firmware: ti_sci: Scan all device instances when releasing exclusive devices
When FIT image with multiple dtbs are involved for R5 boot process,
R5 SPL starts off with the first instance of dtb to probe the
eeprom, then once we have identified the type of board, invocation
of setup_multi_dtb_fit will replace the gd->fdt_blob with the proper
board dtb match. However, when we do this, two things happen:
a) Prior to the invocation of setup_multi_dtb_fit, as part of the eeprom
discovery process, i2c controller device is already probed and marked
as exclusive with the match of the very first tisci match (from the
original boot dtb). This list is stored in the info->dev_list of the
first probe.
b) When the second dtb is loaded, tisci is probed again (since this is a
new node) and the new info->dev_list is empty.
At this stage, the exclusive devices such as i2c instances used to
probe the board information is left in the old info->dev_list that is
no longer used actively by the system using the replaced dtb.
As a result of this, the cleanup we intend to do with
ti_sci_cmd_release_exclusive_devices is no longer complete and
leaves the instances such as i2c for eeprom marked used as we scan just
the new info->dev_list.
This creates a problem when Device Manager(DM) firmware starts up later
on in the boot process and identifies that this instance of i2c is
already marked active, so it assumes this can no longer be controlled
by software and is marked internally as reserved and HLOS can no
longer control these instances. This defeated the purpose of
ti_sci_cmd_release_exclusive_devices.
NOTE: This scheme works just fine if the FIT has just a single dtb as
the info->dev_list is upto date.
To fix this, let us make ti_sci_cmd_release_exclusive_devices scan the
all registrations of tisci instances and cleanup all exclusive devices
that have ever been registered.
As part of this, change the prototype of release_exclusive_devices to
drop the handle since that has no further meaning now.
Though this issue was identified on AM64-sk, this can be present in
other builds which use multi-fit-dtb for R5 SPL startup.
Fixes:
9566b777ae0a ("firmware: ti_sci: Add a command for releasing all exclusive devices")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Stephan Gerhold [Mon, 7 Apr 2025 11:10:00 +0000 (13:10 +0200)]
IOMUX: Fix stopping unused dropped consoles
iomux_match_device() returns -ENOENT instead of the end index, which means
console_stop() is never called at the moment for unused consoles.
This prevents e.g. f_acm from releasing the USB gadget interface when
removing it from stdio/stderr/stdin.
Fixes:
b672c1619bb9 ("IOMUX: Split out iomux_match_device() helper")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Simon Glass [Tue, 1 Apr 2025 21:28:10 +0000 (10:28 +1300)]
tpm: cr50: Support opening the TPM multiple times
The tpm_auto_start() function is used in tests and assumes that it can
open the TPM even if it is already open and a locality claimed. The cr50
driver does not use the common TPM2 TIS code so lacks a check for the
is_open field of struct tpm_chip and in fact it doesn't use that struct.
Add an equivalent check to cr50_i2c_open().
This fixes all init sequences on that TPM -- e.g 'tpm init && tpm init'
or 'tpm autostart && tpm init' used to hang
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Mon, 14 Apr 2025 14:59:45 +0000 (08:59 -0600)]
Merge patch series "Static initcalls"
Jerome Forissier <jerome.forissier@linaro.org> says:
This series replaces the dynamic initcalls (with function pointers) with
static calls, and gets rid of initcall_run_list(), init_sequence_f,
init_sequence_f_r and init_sequence_r. This makes the code simpler and the
binary slighlty smaller: -2281 bytes/-0.21 % with LTO enabled and -510
bytes/-0.05 % with LTO disabled (xilinx_zynqmp_kria_defconfig).
Execution time doesn't seem to change noticeably. There is no impact on
the SPL.
The inline assembly fixes, although they look unrelated, are triggered
on some platforms with LTO enabled. For example: kirkwood_defconfig.
CI: https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25514
Link: https://lore.kernel.org/r/20250404135038.2134570-1-jerome.forissier@linaro.org
Jerome Forissier [Fri, 4 Apr 2025 13:50:37 +0000 (15:50 +0200)]
initcall: remove initcall_run_list()
Now that all initcalls have been converted to static calls, remove
initcall_run_list().
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Jerome Forissier [Fri, 4 Apr 2025 13:50:36 +0000 (15:50 +0200)]
common: board: make initcalls static
Change board_init_f(), board_init_f_r() and board_init_r() to make
static calls instead of iterating over the init_sequence_f,
init_sequence_f_r and init_sequence_r arrays, respectively. This makes
the code a simpler (and even more so when initcall_run_list() is
later removed) and it reduces the binary size as well. Tested with
xilinx_zynqmp_kria_defconfig; bloat-o-meter results:
- With LTO
add/remove: 106/196 grow/shrink: 10/28 up/down: 31548/-33829 (-2281)
Total: Before=1070471, After=1068190, chg -0.21%
- Without LTO
add/remove: 0/54 grow/shrink: 3/0 up/down: 2322/-2832 (-510)
Total: Before=1121723, After=1121213, chg -0.05%
Execution time does not change in a noticeable way.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Jerome Forissier [Fri, 4 Apr 2025 13:50:35 +0000 (15:50 +0200)]
arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set
The mcr and msr instructions are available in Thumb mode only if
Thumb2 is supported. Therefore, if __thumb2__ is not set, make
sure we switch to ARM mode by inserting a .arm directive in the
inline assembly.
Fixes LTO link errors with kirkwood platforms, triggered by a later
commit:
tools/buildman/buildman -o /tmp/build -eP sheevaplug
[...]
{standard input}:24085: Error: selected processor does not support `mrc p15,0,r3,c1,c0,0' in Thumb mode
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Ilias Apalodimas [Sun, 13 Apr 2025 11:34:26 +0000 (14:34 +0300)]
efi_loader: Moved the generated ESL file to objtree
Tom reports that generating the ESL file we need for authenticated
capsule updates fails to work on azure which expects a RO git tree.
Move it to $(objtree)
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Sat, 12 Apr 2025 18:43:40 +0000 (12:43 -0600)]
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Artur Kowalski [Sun, 30 Mar 2025 19:26:39 +0000 (21:26 +0200)]
ARM: tegra20: add funcmux for exposing UART over uSD slot on Tegra 20
UART-A can be exposed through uSD, this was tested on Transformer T20
but should work on all Ventana-based boards.
TX is exported on SDD pingroup corresponding to uSD CLK pin
RX is exported on SDB which is CMD pin in uSD slot
Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Thu, 29 Jun 2023 07:10:26 +0000 (10:10 +0300)]
board: nvidia: tegratab: add Nvidia Tegra Note 7 support
The Tegra Note 7 is a mini tablet computer and the second Tegra 4
based mobile device designed by Nvidia that runs the Android operating
system. The Tegra Note has a 7" IPS display with 1280 x 800 (217 ppi)
resolution. The 1 GB of RAM and 16 GB of internal memory can be
supplemented with a microSDXC card giving up to 64 GB of additional
storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>