Neha Malcom Francis [Mon, 6 Jan 2025 09:07:07 +0000 (14:37 +0530)]
arm: mach-k3: Set NR_DRAM_BANKS to 2
Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
memory/ node for lower and higher addressible DDR regions.
This allows use of FDT functions from fdt_support.c to set up and fix up
the memory/ node correctly.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Santhosh Kumar K [Mon, 6 Jan 2025 09:07:06 +0000 (14:37 +0530)]
ram: k3-ddrss: Remove 'ti,ecc-enable' support
The functionality of enabling Inline ECC is now controlled by
CONFIG_K3_INLINE_ECC. So, remove the support for 'ti,ecc-enable'
property to avoid redundancy and to ensure the Inline ECC feature is
mananged through build-time config.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Neha Malcom Francis [Mon, 6 Jan 2025 09:07:05 +0000 (14:37 +0530)]
drivers: ram: Kconfig: Add CONFIG_K3_INLINE_ECC
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Santhosh Kumar K [Mon, 6 Jan 2025 09:07:04 +0000 (14:37 +0530)]
ram: k3-ddrss: Enable ECC interrupts
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Santhosh Kumar K [Mon, 6 Jan 2025 09:07:03 +0000 (14:37 +0530)]
ram: k3-ddrss: Setup ECC region start and range
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Santhosh Kumar K [Mon, 6 Jan 2025 09:07:02 +0000 (14:37 +0530)]
ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc() to solve 'calculations restricted to 32 bits' issue
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's banks from the device tree memory node, and store in a
64 bit device private data which can be used for ECC reserved memory
calculation, Setting ECC range and Fixing up bank size in device tree
when ECC is enabled.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Georgi Vlaev [Mon, 6 Jan 2025 09:07:01 +0000 (14:37 +0530)]
ram: k3-ddrss: Use the DDR controller BIST engine for ECC priming
The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory, for example. Memset can cut the time in half
and using DMA currently yields a similar result.
The BIST engine of DDR controller provides support for
initializing any memory region with a pattern. This
bypasses the DDRSS bridge, so the required inline ECC
data is not computed and populated in the memory. For
some values like zero, the computed ECC syndrome is also
zero and we can use these values to preload the memory
from the DDR controller, without the assistance of the
bridge.
The registers involved in the process are described in the
'DDR controller registers' topic in [1] AM62 and [2] J721E
reference manuals.
The patch replaces the 'for' loop memory fill function with
the BIST memory initialization procedure. This cuts the time
to preload the 2GB memory from 10 seconds down to 1 second.
The bist preload function uses the lpddr4 APIs in the k3-ddrss,
so this is compatible with devices with both 16-bit LPDDR4 and
32-bit LPDDR4 interfaces (e.g J721E).
[1] AM62x: https://www.ti.com/lit/pdf/spruiv7
[2] DRA829/TDA4VM: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Santhosh Kumar K [Mon, 6 Jan 2025 09:07:00 +0000 (14:37 +0530)]
arm: dts: k3-*-ddr: Add ss_cfg reg entry
Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Neha Malcom Francis <n-francis@ti.com>
Yang Gang [Fri, 3 Jan 2025 08:18:42 +0000 (16:18 +0800)]
efi: Correct ECPT table GUID
Refer to UEFI specification 2.10:
#define EFI_CONFORMANCE_PROFILES_TABLE_GUID \
{ 0x36122546, 0xf7e7, 0x4c8f, \
{ 0xbd, 0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b }}
Signed-off-by: Yang Gang <yanggang@byosoft.com.cn>
Fixes:
6b92c1735205 ("efi: Create ECPT table")
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Sat, 21 Dec 2024 17:45:29 +0000 (11:45 -0600)]
doc/develop/distro.rst: Better document upstream definition of extlinux.conf
First, the "Boot Loader Specification" link has moved to a new location,
so link to that directly. Second, that link does not document as much of
the extlinux.conf format as I recall the old version doing at least.
However, the Syslinux Project wiki is the current location of the documentation
linked to in doc/README.pxe and also has a reference for SYSLINUX. Link
to both of these.
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Fri, 13 Dec 2024 09:20:32 +0000 (10:20 +0100)]
cmd: efidebug: update output of memory attributes
* add EFI_MEMORY_CPU_CRYPTO, EFI_MEMORY_HOT_PLUGGABLE
* correct output for EFI_MEMORY_XP
* remove duplicate list entry for EFI_MEMORY_UC
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Fri, 13 Dec 2024 08:58:40 +0000 (09:58 +0100)]
efi_loader: update EFI specification version
UEFI specification 2.11 has been published.
There are no changes relevant for the U-Boot scope.
So let us update the supported specification version.
Change the comment for the constant to Sphinx style.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Adriano Cordova [Fri, 6 Dec 2024 17:18:34 +0000 (14:18 -0300)]
efi_loader: Expose efi_reinstall_protocol_interface in efi_loader.h
This is done so that the device path protocol interface of the network
device can be changed internally by u-boot when a new bootfile gets
downloaded.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Olivier L'Heureux [Wed, 4 Dec 2024 22:31:00 +0000 (23:31 +0100)]
doc: sandbox: Fix the "sb" command name
The command name was "sbi" instead of "sb" in "doc/usage/cmd/sb.rst",
the file documenting the "sb" command. It is annoying, because the
index in the left panel on the
<https://docs.u-boot.org/en/latest/usage/cmd/sb.html> page shows no
"sb" command, which makes difficult to navigate to the "sb"
documentation.
Fixed the command name: "sbi" -> "sb".
Fixes:
ec6d30649cd5 (doc: sandbox: Add docs for the sb command, 2024-10-28)
Signed-off-by: Olivier L'Heureux <olivier.lheureux@mind.be>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lothar Rubusch [Wed, 4 Dec 2024 18:33:13 +0000 (18:33 +0000)]
doc: develop: Fix typos and wording in gdb.rst
Fix some typos and duplicate words in gdb.rst.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Lothar Rubusch [Wed, 4 Dec 2024 18:33:12 +0000 (18:33 +0000)]
doc: develop: Fix typos and wording in binman/binman.rst
Fix some typos and duplicate words in binman.rst.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 Dec 2024 15:24:25 +0000 (08:24 -0700)]
efi_loader: Update startimage_exit self-test to check error
Check for an error returned from the decompress() function, just in
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Aleksandar Gerasimovski [Fri, 29 Nov 2024 21:09:44 +0000 (21:09 +0000)]
efi_loader: fix pe reloc pointer overrun
The fix provided by
997fc12ec91 is actually introducing
a buffer overrun, and the overrun is effective if the
memory after the reloc section is not zeroed.
Probably that's why this bug is not always noticeable.
The problem is that 8-bytes 'rel' pointer can be 4-bytes aligned
according to the PE Format, so the actual relocate function can
take values after the reloc section.
One example is the following dump from the reloc section:
bce26000: 3000 0000 000c 0000 0000 0000 0000 0000
bce26010: 7c00 9340 67e0 f900 1c00 0ea1 a400 0f20
This section has two relocations at offset
bce26008 and
bce2600a,
however the given size (rel_size) for this relocation is 16-bytes
and this is coming form the efi image Misc.VirtualSize, so in this
case the 'reloc' pointer ends at affset
bce2600c and is taken as
valid and this is where the overflow is.
In our system we see this problem when we are starting the
Boot Guard efi image.
This patch is fixing the overrun while preserving the fix done
by
997fc12ec91.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@belden.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Ilias Apalodimas [Thu, 28 Nov 2024 07:11:20 +0000 (09:11 +0200)]
efi_loader: Don't warn if the TCG2 FinalEvents table is not installed
When the TCG2 protocol installation fails, we are trying to remove
all the objects we created in tcg2_uninit().
However, there are cases when this function runs before the config
table was installed. So instead of printing an error unconditionally
check against EFI_NOT_FOUND and don't print anything if the table wasn't
installed to begin with.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Wed, 27 Nov 2024 07:06:30 +0000 (08:06 +0100)]
cmd: bootmenu: add parameter -e for UEFI boot options
The bootmenu command can display
* menu entries defined by environment variables
* menu entries defined by UEFI boot options
Not in all cases showing the UEFI boot options is desired.
Provide a new parameter '-e' to select the display of UEFI boot options.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Wed, 27 Nov 2024 07:06:29 +0000 (08:06 +0100)]
net: eth_bootdev_hunt() should not run DHCP
Currently when booting dhcp_run() may be executed multiple times:
once in eth_bootdev_hunt() and once in the network booting bootmeth.
We need to call eth_bootdev_hunt() when setting up the EFI sub-system to
supply the simple network protocol. We don't need an IP address set up.
We can reduce the bootime by not executing dhcp_run() in
eth_bootdev_hunt().
Furthermore eth_bootdev_hunt() with autostart=yes leads on the legacy
network stack leads to downloading a file via TFTP and to booting the
downloaded file.
Instead of running dchp_run() just check that there is a network device
in eth_bootdev_hunt().
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Wed, 27 Nov 2024 07:06:28 +0000 (08:06 +0100)]
CI: xilinx_versal_virt: disable USB_DWC3
The CI uses the following command to launch xilinx_versal_virt_defconfig:
qemu-system-aarch64 -M xlnx-versal-virt \
-display none -m 4G -serial mon:stdio \
-device loader,file=u-boot,cpu-num=0
'usb start' or invoking eth_bootdev_hunt leads to a crash when function
dwc3_core_init() tries to access a register at offset 0xc704 (DWC3_DCTL)
relative to the register start address 0xfe20c100.
Disable CONFIG_USB_DWC3 in the CI until the driver problem is fixed.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Wed, 27 Nov 2024 07:06:27 +0000 (08:06 +0100)]
configs: sandbox_deconfig: remove CONFIG_AMIGA_PARTITION
We do not actually test the code.
Scanning for Amiga partitions of the sandbox is extremely slow,
especially on the partially implemented USB device.
For build testing the other sandbox defconfigs are good enough.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Wed, 27 Nov 2024 07:06:26 +0000 (08:06 +0100)]
test: fix test_extension.py
test_extension.py assumes that no extension is known at test start.
This assumption is wrong because we do not come out of reboot.
A prior test may have already hunted for the extension bootdev.
Remove the invalid assert.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Tue, 26 Nov 2024 23:40:17 +0000 (00:40 +0100)]
efi_loader: avoid writing message in Exit() boot service
We should not write messages in UEFI API functions. This may lead to
incorrect screen layout in UEFI application.
For single statements after if clause we don't need braces.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 23 Nov 2024 08:47:54 +0000 (09:47 +0100)]
examples: use QEMU compatible LOAD_ADDR on RISC-V
On some RISC-V including QEMU $loadaddr is 0x80200000.
For bootelf to work choose a different LOAD_ADDR to which the demo ELF
binary is relocated.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 23 Nov 2024 08:47:53 +0000 (09:47 +0100)]
examples: use architecture specific memset() on RISC-V
Build the architecture specific memset() if configured.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 23 Nov 2024 08:47:52 +0000 (09:47 +0100)]
examples: implement _start and syscall for RISC-V
To build the API examples on RISC-V we need to
implement _start and syscall for RISC-V.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 23 Nov 2024 08:47:51 +0000 (09:47 +0100)]
API: unify platform_sys_info() implementations
ARM, MIPS, and RISCV can use the same implementation of
platform_sys_info(). PPC provides some extra information.
So keep it separate.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sean Edmond [Mon, 29 Apr 2024 18:51:16 +0000 (11:51 -0700)]
Fix neighbor discovery ethernet address saving
When a successful neighbor advertisement is received, the ethernet
address should be saved for later use to avoid having to redo the
neighbor discovery process.
For example, with TFTP the address should get saved into
"net_server_ethaddr". This is being done correctly with ARP for IPv4,
but not for neighbor discovery with IPv6.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Jerome Forissier [Fri, 29 Nov 2024 14:47:32 +0000 (15:47 +0100)]
net: tftpput: reset timeout_count when an ACK is received
timeout_count is never reset once a tftpput transfer has started. If for
whatever reason timeouts occur frequently, but the server keeps replying
nonetheless, the transfer may be needlessly aborted.
Reset timer_count on reception of an ACK to avoid this situation.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Frank Sae [Sun, 24 Nov 2024 07:38:44 +0000 (23:38 -0800)]
net: phy: Add driver for Motorcomm YT8521S Gigabit ethernet phy
Add driver for Motorcomm YT8521S Gigabit ethernet phy.
Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Frank Sae [Sun, 24 Nov 2024 07:38:43 +0000 (23:38 -0800)]
net: phy: Add driver for Motorcomm YT8531S Gigabit ethernet phy
Add driver for Motorcomm YT8531S Gigabit ethernet phy.
Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Heinrich Schuchardt [Tue, 19 Nov 2024 10:09:07 +0000 (11:09 +0100)]
net: correct the description of ip_to_string()
The output of ip_to_string() is a string.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Markus Gothe [Tue, 19 Nov 2024 14:26:44 +0000 (08:26 -0600)]
Bitbanging MDIO driver for DM framework.
Linux DTS compatible MDIO bitbanging driver.
Both clause 22 and clause 45 MDIO supported and validated.
Heavily based on the Linux drivers (more or less the same code base).
Signed-off-by: Markus Gothe <markus.gothe@genexis.eu>
Rufus Segar [Wed, 4 Dec 2024 13:34:30 +0000 (13:34 +0000)]
Revert "net: phy: marvell 88e151x: Fix handling of bare RGMII interface type"
This reverts commit
431be621c6cbc72efd1d45fa36686a682cbb470a.
Section 3.3 of Reduced Gigabit Media Independent Interface (RGMII)
Version 2.0 (4/1/2002) details that a PHYs using a ~2ns internal delay
are referred to as RGMII-ID. This internal delay is optional.
Page 147-148 of the Marvell Doc. No. MV-S107146-U0 Rev. F details
timings of the RX/TX delays. We see that with the TX/RX_CLK delay
enabled, our RX/TX_CTL signal is shifted w.r.t CLK to reflect the delay
added.
In 431be62 there is no timing difference between RGMII and RGMII-ID, and
so programmers wanting to explicitly set their PHY to RGMII will find
that delay added anyway. This could throw off timing if that internal
delay is undesired.
We should be handling all 4 possible RGMII cases of PHY_INTERFACE_MODE:
RGMII, RGMII_ID, RGMII_TXID, and RGMII_RXID. Reverting 431be62
implements this.
See also m88e1111_config_init_rgmii_delays in the equivalent driver in
Linux (drivers/net/phy/marvell.c), which does not set these delays in
RGMII mode.
68e6eca was tested out on an 88E1512 PHY in RGMII-ID mode. This
reversion has been tested by myself on an 88E1518 in RGMII-ID mode. This
patch affects boards using this driver in "rgmii" mode, as the internal
delay will no longer be enabled. Namely kikwood-nsa310s.
Signed-off-by: Rufus Segar <rhs@riseup.net>
Mikhail Kshevetskiy [Wed, 1 Jan 2025 03:20:16 +0000 (06:20 +0300)]
net: tftpboot: clear timeout_count on every successful block
We have a some boards that rarely starts networking abnormally, so there are
many timeouts during file transfer. In the same time there is a normal transfer
between timeouts. In this case we can continue transfer (instead of connection
aborting) by just clearing timeout counter on every successful block.
This patch does not affect the case when several timeouts happen one after
another. The transfer will be aborted. Thus the transfer will be
continued in the case of unstable link, but will be aborted in the case
of inaccessible server.
Feature downside: it may greatly slowdown (instead of abort) file transfer
in the case of unstable link.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Tom Rini [Wed, 1 Jan 2025 01:00:54 +0000 (19:00 -0600)]
Merge patch series "Add 'trace wipe'"
Jerome Forissier <jerome.forissier@linaro.org> says:
This short series adds the 'trace wipe' command which clears the trace
buffer, allowing to re-start a capture from scratch.
Link: https://lore.kernel.org/r/cover.1734093566.git.jerome.forissier@linaro.org
Jerome Forissier [Fri, 13 Dec 2024 12:45:38 +0000 (13:45 +0100)]
trace: document 'trace wipe'
Add documentation for the 'trace wipe' command.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jerome Forissier [Fri, 13 Dec 2024 12:45:37 +0000 (13:45 +0100)]
test: test_trace.py: test 'trace wipe'
Test the newly added 'trace wipe' command.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jerome Forissier [Fri, 13 Dec 2024 12:45:36 +0000 (13:45 +0100)]
trace: add support for 'trace wipe'
Implement a 'trace wipe' command to delete the currently accumulated
trace data. This comes handy when someone needs to trace a particular
command. For example:
=> trace pause; trace wipe
=> trace resume; dhcp; trace pause
=> trace stats
=> trace calls 0x02100000 0x10000000
=> tftpput $profbase $profoffset 192.168.0.16:trace.bin
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jerome Forissier [Fri, 6 Dec 2024 10:11:31 +0000 (11:11 +0100)]
trace: proftool: dump-ftrace should write funcgraph times in ns not us
When converting a U-Boot trace records file to ftrace function graph
format for use by trace-cmd ('proftool -f funcgraph dump-ftrace'), the
time associated to each function is incorrectly saved in microseconds
instead of nanoseconds. Multuply the value by 1000 to fix the issue.
With this change, the trace-cmd output looks consistent. Here is an
example with udelay(25) added to mem_malloc_init() as a test case:
$ ./tools/proftool -m System.map -t /tmp/trace.bin -f funcgraph \
dump-ftrace -o /tmp/trace.dat
$ trace-cmd report /tmp/trace.dat >/tmp/trace.log
$ vi /tmp/trace.log
[...]
u-boot-1 [000] 6.719659: funcgraph_entry: | mem_malloc_init() {
u-boot-1 [000] 6.719659: funcgraph_entry: | udelay() {
u-boot-1 [000] 6.719660: funcgraph_entry: | schedule() {
u-boot-1 [000] 6.719660: funcgraph_entry: | cyclic_run() {
u-boot-1 [000] 6.719660: funcgraph_entry: 1.000 us | cyclic_get_list();
u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | }
u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | }
u-boot-1 [000] 6.719661: funcgraph_entry: | __udelay() {
u-boot-1 [000] 6.719662: funcgraph_entry: 0.000 us | usec_to_tick();
u-boot-1 [000] 6.719687: funcgraph_exit: + 26.000 us | }
u-boot-1 [000] 6.719687: funcgraph_exit: + 28.000 us | }
u-boot-1 [000] 6.719687: funcgraph_entry: # 37971.000 us | memset();
u-boot-1 [000] 6.757658: funcgraph_exit: # 37999.000 us | }
u-boot-1 [000] 6.757658: funcgraph_exit: # 38000.000 us | }
In the above dump, the udelay() call is reported as taking 26 us which
is consistent with the timestamps (6.719687 - 6.719659 = 0.000026).
Without this patch we would have "0.026 us" instead of "+ 26.000 us".
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Tue, 31 Dec 2024 21:24:34 +0000 (15:24 -0600)]
Merge patch series "Fix OSPI boot for J722S"
Prasanth Babu Mantena <p-mantena@ti.com> says:
This series fixes OSPI boot for J722S. It contains fixes for DMSC
communication, R5 regmap for ospi and dma specific overrides for ospi.
Test log: https://gist.github.com/PrasanthBabuMantena/
ad469dd09ab7263f85f87dadda46c86d
Link: https://lore.kernel.org/r/20241218131341.2073823-1-p-mantena@ti.com
Udit Kumar [Wed, 18 Dec 2024 05:55:14 +0000 (11:25 +0530)]
arm: dts: k3-j721e-beagleboneai: Move to OF_UPSTREAM
Move to using OF_UPSTREAM config and thus using the devicetree
subtree and remove unused device tree files.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Manorit Chawdhry [Tue, 17 Dec 2024 08:54:37 +0000 (14:24 +0530)]
drivers: firmware: ti_sci: Add DM_FLAG_PRE_RELOC to driver
Currently the driver relies on bootph flag to probe it during PRE_RELOC
stage but with the upcoming cleanup of v6.13, we don't have the bootph
property in the parent nodes anymore and ti_sci driver being one of the
parent nodes required during SPL stage would end up hampering the probe
model [0].
Add DM_FLAG_PRE_RELOC to ti_sci driver for mitigating this issue.
[0]: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/21
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Bryan Brattlof [Tue, 10 Dec 2024 21:43:30 +0000 (15:43 -0600)]
arm: dts: k3-am62p-sk-binman: add SE security variant builds
The Texas Instruments Foundational Security (TIFS) firmware must match
the security level configured on the SoC. To boot Security Enforced (SE)
variants of the AM62Px, add another tiboot3 build which packages the
Security Enforced (SE) firmware variant for AM62Px SoCs.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Vaishnav Achath [Wed, 18 Dec 2024 13:13:41 +0000 (18:43 +0530)]
arm: dts: k3-j722s*: Add overrides specific to OSPI
OSPI Boot requires overrides specific to R5 and also
to use DMA in R5 SPL stage the DM_TIFS needs to be used.
Add the corresponding overrides for R5 SPL stage.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Vaishnav Achath [Wed, 18 Dec 2024 13:13:40 +0000 (18:43 +0530)]
arm: mach-k3: j722_spl: Add FAST XSPI boot mode
Fast XSPI boot mode is supported by J722S ROM, add that.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Vaishnav Achath [Wed, 18 Dec 2024 13:13:39 +0000 (18:43 +0530)]
arm: dts: k3-j722s-r5-evm: Fix DM2TIFS secproxy thread ID
Fix the DM2TIFS secureproxy thread ID as per the latest TISCI
documentation for J722S.
https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/sec_proxy.html
Fixes:
fc2da3a3d0d3 ("arm: dts: Introduce J722S U-Boot dts files")
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Vaishnav Achath [Wed, 18 Dec 2024 13:13:38 +0000 (18:43 +0530)]
mailbox: k3-sec-proxy: Add DM to DMSC communication thread for J722S
J722S R5 SPL uses sec-proxy threads 28 and 29 for communication with
TIFS. Mark these as valid threads in the driver.
https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/sec_proxy.html
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Tom Rini [Tue, 31 Dec 2024 16:59:06 +0000 (10:59 -0600)]
Merge patch series "Cumulative fixes and updates for MediaTek ethernet driver"
Weijie Gao <weijie.gao@mediatek.com> says:
This patch series contains fixes and updates for mtk_eth driver.
Link: https://lore.kernel.org/r/cover.1734406967.git.weijie.gao@mediatek.com
Weijie Gao [Tue, 17 Dec 2024 08:40:03 +0000 (16:40 +0800)]
net: mediatek: fix usability with wget command
The wget command currently cannot work correctly with mtk_eth driver.
This patch fixed this by increase DMA ring size and invalidate ring data
after use.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:59 +0000 (16:39 +0800)]
net: mediatek: don't enable GDMA cpu bridge unconditionally for NETSYSv3
Enable GDMA cpu bridge only when 10Gb interface is enabled for GMAC other
than GMAC0, or when MT7988 internal switch is used.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:55 +0000 (16:39 +0800)]
net: mediatek: make sgmii/usxgmii optional
Not all platforms supports sgmii and/or usxgmii. So we add Kconfig
options for these features and enable them only for supported
platforms.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:50 +0000 (16:39 +0800)]
net: mediatek: add support for 10GBASE-R
This patch adds support for 10GBASE-R interface mode
Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:46 +0000 (16:39 +0800)]
net: mediatek: fix gmac2 usability for mt7629
MT7629 need extra setting for gmac2 to work. So additional
capability is added for mt7629 to handle this case.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:41 +0000 (16:39 +0800)]
net: mediatek: fix sgmii selection for mt7622
Unlike other platforms, mt7622 has only one SGMII and it can be
attached to either gmac1 or gmac2. So the register field of the
sgmii selection differs from other platforms as newer platforms can
control each sgmii individually.
This patch adds a new capability for mt7622 to handle this case.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:27 +0000 (16:39 +0800)]
net: mediatek: correct register name of ethsys syscfg1
The SYSCFG0 should be SYSCFG1 according to the programming guide.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:23 +0000 (16:39 +0800)]
net: mediatek: use correct register field for SGMII speed selection
The register field for SGMII speed selection is a 2-bit field with
value 0 for 1Gbps and 1 for 2.5Gbps (2/3 are reserved).
So it's necessary to set both bits instead of just setting/clearing
only the lower bit.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:20 +0000 (16:39 +0800)]
arm: dts: mt7629: fix sgmii clock selection for ethernet
Setup correct parent of clock CLK_TOP_SGMII_REF_1_SEL to allow
sgmiisys1 work correctly.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 17 Dec 2024 08:39:16 +0000 (16:39 +0800)]
clk: mediatek: mt7629: fix parent clock of some top clock muxes
According to the mt7629 programming guide, the CLK_TOP_F10M_REF_SEL
shares the same parent selection with CLK_TOP_IRRX_SEL, while the
present parent selection for CLK_TOP_F10M_REF_SEL is actually used
for CLK_TOP_SGMII_REF_1_SEL.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tom Rini [Tue, 31 Dec 2024 16:58:36 +0000 (10:58 -0600)]
Merge patch series "Select CONFIG_64BIT for sandbox64 and x86_64"
Andrew Goodbody <andrew.goodbody@linaro.org> says:
Picking up a series from Dan Carpenter and applying requested
changes for v2.
I had previously set CONFIG_64BIT for arm64. This patchset does the
same thing for sandbox and x86_64. (Mips and riscv were already
doing it). This CONFIG option is used in the Makefile to determine
if it's a 32 or 64 bit system for the CHECKER.
Makefile
1052 # the checker needs the correct machine size
1053 CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)
Link: https://lore.kernel.org/r/20241216180736.1933807-1-andrew.goodbody@linaro.org
Andrew Goodbody [Mon, 16 Dec 2024 18:07:36 +0000 (18:07 +0000)]
test: lib: Use CONFIG_64BIT to detect 64 bit compile
Should use CONFIG_64BIT to detect a 64 bit compile and not
CONFIG_PHYS_64BIT. This allows more platforms to run the
full test code.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Mon, 16 Dec 2024 18:07:35 +0000 (18:07 +0000)]
x86: select CONFIG_64BIT for X86_64
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to
static analysis tools.
Introduce CONFIG_SPL_64BIT and select it for architectures other than
x86 with 64 bit builds. Do not select it for x86 builds as x86 uses
a 32 bit SPL.
Ensure that when limits are set they use CONFIG_64BIT for U-Boot
proper and CONFIG_SPL_64BIT for SPL. This is to allow for the 32 bit
SPL build used by x86.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Mon, 16 Dec 2024 18:07:34 +0000 (18:07 +0000)]
sandbox: select CONFIG_64BIT for sandbox
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to
static analysis tools.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Mon, 16 Dec 2024 18:07:33 +0000 (18:07 +0000)]
sandbox: Correct guard around readq/writeq
In include/linux/io.h the declarations of ioread64 and iowrite64
which make use of readq/writeq are guarded with CONFIG_64BIT so
guard the sandbox declarations of readq and writeq also with
CONFIG_64BIT.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Tom Rini [Tue, 31 Dec 2024 16:57:54 +0000 (10:57 -0600)]
Merge patch series "Keep the access to dtb_dt_embedded() within fdtdec"
Evgeny Bachinin <EABachinin@salutedevices.com> says:
The 1st patch addresses comments from the post-review, available by
link [1].
The 2nd patch fixes problems of dtb_dt_embedded() with checkpatch.
Links:
[1] https://lore.kernel.org/u-boot/CAFLszTgEKamsa6FTnjzrEWQBLkqAR7EBbZqffx09AKgQ7ppuVA@mail.gmail.com/#t
Link: https://lore.kernel.org/r/20241211-dtb_dt_embedded_within_fdtdec-v1-0-7840469f0084@salutedevices.com
Evgeny Bachinin [Tue, 10 Dec 2024 22:39:58 +0000 (01:39 +0300)]
fdtdec: dtb_dt_embedded: replace ifdefs by IS_ENABLED()
Patch fixes the checkpatch warnings like:
```
WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef'
#94: FILE: lib/fdtdec.c:102:
+#ifdef CONFIG_OF_EMBED
```
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Evgeny Bachinin [Tue, 10 Dec 2024 22:39:57 +0000 (01:39 +0300)]
fdtdec: encapsulate dtb_dt_embedded() within
Patch keeps the access to dtb_dt_embedded() within fdtdec API,
by means of new API function introduction. This new function is a
common place for updating appropriate global_data fields for
OF_EMBED case.
Also, the consequence of the patch is movement of '___dtb_dt_*begin'
symbols' declaration from header file, because nobody used symbols
outside the lib/fdtdec.c.
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 31 Dec 2024 14:08:59 +0000 (08:08 -0600)]
Merge tag 'v2025.01-rc6' into next
Prepare v2025.01-rc6
Tom Rini [Tue, 31 Dec 2024 04:07:58 +0000 (22:07 -0600)]
Prepare v2025.01-rc6
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 12 Dec 2024 22:33:36 +0000 (16:33 -0600)]
Gitlab: Remove some "rules:when: always" lines
In commit
399f739be6b2 ("CI: allow jobs to be run in merge requests") we
added "rules:when: always" to many stages of the pipeline to allow for merge
requests to trigger a run. However based on current Gitlab
documentation, we should still be triggered on merge requests without
this. Furthermore the way we have things written today we always run all
stages of the CI rather than failing out early on problems, which is not
always useful. Remove these as we should still be fine with merge
requests triggering a run.
Link: https://docs.gitlab.com/ee/ci/yaml/#rules
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 12 Dec 2024 20:14:59 +0000 (14:14 -0600)]
Gitlab: Make test.py stage only depend on binman et al testsuite
Our Gitlab pipeline is currently broken up in to several stages. This
was done with the thought process of "we should test tools and if
they're good test emulated targets and if they're good test real
hardware and if they're good test the world". However, in terms of that
first stage it only really matters that binman, et al are still
functional. And for a few years now Gitlab has had a "needs" keyword
that lets you refine pipeline dependencies. Use this to perform the
minor optimization of having test.py only require that tool testing job.
This will become more useful later when we add long running testsuites
that we do not want to block later jobs.
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 20 Dec 2024 03:59:27 +0000 (20:59 -0700)]
sandbox: Adjust configuration to hang on panic()
It is annoying to have sandbox enter a boot loop when an assertion
fails. Hang instead, since then the error message is only printed once
and Ctrl-C can be used to quit, as per normal.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 30 Dec 2024 21:55:33 +0000 (15:55 -0600)]
Merge patch series "Misc. PowerPC MPC83xx fixes/cleanups"
J. Neuschäfer <j.ne@posteo.net> says:
This patchset contains a few small fixes/cleanups for the MPC83xx
platform.
Link: https://lore.kernel.org/r/20241220-mpc83xx-misc-v2-0-ff4c17ee5fa4@posteo.net
J. Neuschäfer [Fri, 20 Dec 2024 10:37:54 +0000 (11:37 +0100)]
gpio: mpc8xxx: Preserve pre-init state of outputs
The mpc8xxx_gpio driver contains a workaround for certain chips
where the previously written state of outputs cannot be read back
from the GPIO data (GPDAT) register (MPC8572/MPC8536). This workaround
consists of tracking the state of GPDAT in a "shadow register" (i.e. a
software variable). The shadow register is initialized to zero.
This results in a problem w.r.t. outputs that are configured to a
high (1) state before U-Boot runs, but not touched by U-Boot itself:
Due to the zero-initialization, these GPIOs end up being set to zero,
the first time that any other output is set.
To avoid such issues initialize the GPDAT shadow register to the value
previously held by any outputs, if possible. On MPC8572/MPC8536 this
should make no difference, i.e. the shadow register should be
initialized to zero on these chips.
This patch has been tested on a MPC8314E-based board.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
J. Neuschäfer [Fri, 20 Dec 2024 10:37:53 +0000 (11:37 +0100)]
powerpc: mpc83xx: Use defined constant for SPCR[TBEN]
To increase readability, use the defined constant instead of specifying
SPCR[TBEN] as a number.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
J. Neuschäfer [Fri, 20 Dec 2024 10:37:52 +0000 (11:37 +0100)]
powerpc: mpc83xx: Allow including initreg.h into multiple files
Globals defined in headers can result in multiple-definition errors
while linking, if they are visible beyond the current translation unit.
This hasn't been a problem for initreg.h so far, but would become a
problem in the next patch, where I use a constant from initreg.h in a
second C file.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
J. Neuschäfer [Fri, 20 Dec 2024 10:37:51 +0000 (11:37 +0100)]
powerpc: mpc83xx: Fix timer value calculation
TBU and TBL are specified as two 32-bit registers that form a 64-bit
value, but the calculation only shifted TBU by 16 bits.
Fix this by actually shifting 32 bits.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Tom Rini [Mon, 30 Dec 2024 21:55:11 +0000 (15:55 -0600)]
Merge patch series "powerpc: Fix and enforce distinction between immediates and registers"
J. Neuschäfer <j.ne@posteo.net> says:
This patchset changes the definition r0 etc. to %r0, so that the
assembler can check that registers are only used where expected, and
fixes the fallout.
Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net
J. Neuschäfer [Thu, 12 Dec 2024 17:05:47 +0000 (18:05 +0100)]
powerpc: Introduce and enforce assembler checks on GPR usage
PowerPC general-purpose registers are historically specified as plain
numbers (0-31), which makes them hard to distinguish from immediates.
For this reason, include/ppc_asm.tmpl defines aliases named r0-r31.
This can still lead to uncaught mistakes if a register is used in place
of a number.
Instead of (e.g.) 5 use %r5, which will result in an assembler warning
if used as a number. Turn these warnings into errors by passing
`--fatal-warnings` to the assembler.
I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
J. Neuschäfer [Thu, 12 Dec 2024 17:05:46 +0000 (18:05 +0100)]
powerpc: Fix 0 vs. r0 confusion in X/D-form instructions
Instructions such as dcbi are in the X-form; they have RA and RB fields
and the effective address (EA) is computed as (RA|0)+(RB). In words,
this means that if RA is zero, the left-hand side of the addition is
zero, otherwise the corresponding GPR is used. r0 can never be used on
the left-hand side of a X-form instruction.
For D-form instructions such as addis, the Power ISA illustrates this in
the instruction pseudo-code:
if RA = 0 then RT <- EXTS(SI || 0x0000)
else RT <- (RA) + EXIS(SI || 0x0000)
In all of these cases, RA=0 indicates the value zero, not register r0.
I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Jim Liu [Tue, 10 Dec 2024 06:35:05 +0000 (14:35 +0800)]
gpio: npcm: Add persist feature to sgpio module
Base on GPIO hog to support sgpio persist enable feature.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Jim Liu [Wed, 20 Nov 2024 01:21:54 +0000 (09:21 +0800)]
configs: arbel_evb: enable arbel feature
Enable GPIO_HOG, net, WDT feature for Arbel EVB.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Tom Rini [Mon, 30 Dec 2024 19:22:15 +0000 (13:22 -0600)]
Merge patch series "Cleanup the LMB subsystem"
Ilias Apalodimas <ilias.apalodimas@linaro.org> says:
The LMB subsystem was used opportunistically for a number of years.
A while back Sughosh merged it with the EFI subsystem in order to have a
common allocator and avoid subsystems overwriting memory they shouldn't.
This is an initial cleanup of all the crud we gathered over the years.
There's no functional change expected from the patches as they just cleanup
some abstraction functions and rename a few variables to make more
sense.
I plan to make even bigger changes -- e.g I don't see the point of
having *_alloc() and *_reserve() versions of the functions since they
do the same thing and just cause confusion. lmb_alloc_addr_flags()
returning the base address on success makes little sense since we
already *request* the address on the function arguments, etc.
Since this patchset grew enough already, I'd like to get it in
before more refactoring happens.
It's worth noting that although some patches slightly increase the code
size due to an extra flags argument being carried around, the final
result is eventually smaller.
# qemu_arm64_lwip_defconfig (version string adds another 20b)
add/remove: 0/5 grow/shrink: 15/1 up/down: 568/-628 (-60)
Function old new delta
lmb_alloc_base 80 324 +244
lmb_alloc_addr 8 144 +136
lmb_reserve 8 96 +88
version_string 50 70 +20
boot_relocate_fdt 488 508 +20
boot_ramdisk_high 268 284 +16
lmb_add_region_flags 696 704 +8
boot_fdt_reserve_region 100 108 +8
load_serial 548 552 +4
lmb_alloc 8 12 +4
image_setup_libfdt 368 372 +4
do_load 728 732 +4
do_bootz 332 336 +4
do_booti 520 524 +4
bootm_run_states 2176 2180 +4
lmb_alloc_addr_flags 4 - -4
boot_fdt_add_mem_rsv_regions 284 280 -4
lmb_alloc_base_flags 76 - -76
lmb_reserve_flags 96 - -96
_lmb_alloc_addr 144 - -144
_lmb_alloc_base 304 - -304
Total: Before=1020102, After=1020042, chg -0.01%
# sandbox_defconfig (version string adds another 20b)
add/remove: 0/3 grow/shrink: 24/3 up/down: 523/-501 (22)
Function old new delta
lmb_alloc_base 48 299 +251
lmb_alloc_addr 4 92 +88
lmb_reserve 4 58 +54
test_alloc_addr 2933 2963 +30
version_string 50 70 +20
lib_test_lmb_overlapping_reserve 1018 1030 +12
lmb_add_region_flags 600 610 +10
test_multi_alloc.constprop 3034 3042 +8
test_get_unreserved_size 1032 1038 +6
boot_relocate_fdt 599 605 +6
boot_fdt_reserve_region 67 73 +6
lmb_alloc 4 9 +5
lmb_free_flags 190 194 +4
wget_handler 1530 1533 +3
tftp_handler 1190 1192 +2
test_noreserved 1207 1209 +2
test_bigblock 911 913 +2
load_serial 946 948 +2
lib_test_lmb_flags 2101 2103 +2
do_spi_flash 3150 3152 +2
do_bootz 526 528 +2
do_bootm_linux 2067 2069 +2
bootm_run_states 5275 5277 +2
_fs_read.lto_priv 331 333 +2
lmb_dump_region.lto_priv 356 353 -3
lmb_add 59 52 -7
efi_allocate_pages.part 303 249 -54
lmb_reserve_flags 65 - -65
_lmb_alloc_addr.lto_priv 92 - -92
_lmb_alloc_base.lto_priv 280 - -280
Total: Before=2492722, After=2492744, chg +0.00%
Link: https://lore.kernel.org/r/20241218070251.686383-1-ilias.apalodimas@linaro.org
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:37 +0000 (09:02 +0200)]
lmb: Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()
lmb_alloc_addr_flags() is a wrapper for _lmb_alloc_addr() and it's the
only function using it. Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()
and remove the wrapper.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:36 +0000 (09:02 +0200)]
lmb: Remove lmb_alloc_base_flags()
lmb_alloc_base() is just calling lmb_alloc_base_flags() with LMB_NONE.
There's not much we gain from this abstraction, so let's remove the
former add the flags argument to lmb_alloc_base() and make the code
a bit easier to follow.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:35 +0000 (09:02 +0200)]
lmb: Remove lmb_alloc_addr_flags()
lmb_alloc_addr() is just calling lmb_alloc_addr_flags() with LMB_NONE
There's not much we gain from this abstraction, so let's remove the
latter, add a flags argument to lmb_alloc_addr() and make the code a
bit easier to follow.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:34 +0000 (09:02 +0200)]
lmb: Remove lmb_add_region()
There's no point defining a function that's called only once just to
avoid passing the flags. Remove the wrapper and just call
lmb_add_region_flags().
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:33 +0000 (09:02 +0200)]
lmb: Rename free_mem to available_mem
free_mem is a misnomer. We never update it with the free memory for
LMB. Instead, it describes all available memory and is checked against
used_mem to decide whether an area is free or not.
So let's rename this field to better match its usage.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:32 +0000 (09:02 +0200)]
lmb: Remove lmb_reserve_flags()
lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE.
There's not much we gain from this abstraction.
So let's remove the latter, add the flags argument to lmb_reserve()
and make the code a bit easier to follow.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:31 +0000 (09:02 +0200)]
lmb: Move enum lmb_flags to a u32
LMB flags is not an enum anymore. It's currently used as a bitmask
in various places of our code. So make it a u32 which is more
appropriate when dealing with masks.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Wed, 18 Dec 2024 07:02:30 +0000 (09:02 +0200)]
lmb: Remove lmb_align_down()
We already have a macro for this. Use it instead of adding yet another
variant for alignment.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Mon, 30 Dec 2024 19:20:33 +0000 (13:20 -0600)]
Merge patch series "lmb: Improve style"
Sam Protsenko <semen.protsenko@linaro.org> says:
Cleanup the LMB code a bit, after fixing the false positive error
messages. No functional change. This series depends on [1] (which is
"lmb: Fix reserving the same region multiple times").
Link: https://lore.kernel.org/r/20241211022550.2995-1-semen.protsenko@linaro.org
Sam Protsenko [Wed, 11 Dec 2024 02:25:50 +0000 (20:25 -0600)]
lmb: Improve kernel-doc comments
Fix warnings from kernel-doc script. Improve and unify overall style of
kernel-doc comments in lmb source files. Move all kernel-doc comments
for public functions into the header, as recommended in U-Boot
documentation [1]:
Non-trivial functions should have a comment which describes what
they do. If it is an exported function, put the comment in the
header file so the API is in one place. If it is a static function,
put it in the C file.
This also takes care of existing duplication. While at it, do a bit of
cosmetic cleanups as well.
No functional change.
[1] doc/develop/codingstyle.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Sam Protsenko [Wed, 11 Dec 2024 02:25:49 +0000 (20:25 -0600)]
lmb: Improve coding style
Fix checkpatch warnings. No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Sam Protsenko [Wed, 11 Dec 2024 02:25:48 +0000 (20:25 -0600)]
lmb: Make const flag_str[] in lmb_print_region_flags() more const
flag_str[] is a pointer to const. Make it also a const pointer. Improve
a style a bit while a it, to make this line fit 80 characters limit.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Sam Protsenko [Wed, 11 Dec 2024 02:25:47 +0000 (20:25 -0600)]
lmb: Fix flags data type in lmb_add_region_flags()
rgnflags variable in lmb_add_region_flags() has incorrect type: it's
declared as phys_size_t when it should be enum lmb_flags. That
copy-paste mistake was firstly introduced in commit
59c0ea5df33f ("lmb:
Add support of flags for no-map properties"), and then copied further
into commit
ed17a33fed29 ("lmb: make LMB memory map persistent and
global"). Fix it by using the correct type to match struct lmb_region
field.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tom Rini [Mon, 30 Dec 2024 18:55:39 +0000 (12:55 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
Venkatesh Yadav Abbarapu [Mon, 30 Dec 2024 07:02:06 +0000 (12:32 +0530)]
mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled
Update the spi_nor_read() function based on the config SPI_FLASH_BAR
and update the length and bank calculation by spliting the memory of
16MB size banks only when the address width is 3byte.
Fix the read issue for 4byte address width by passing the entire
length to the read function.
Fixes:
5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support")
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>