From: Andrzej Hajda <a.hajda@samsung.com>
Date: Tue, 17 Mar 2015 17:14:07 +0000 (+0900)
Subject: ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420
X-Git-Tag: omap-for-v4.2/o2_dc~53^2~3^2~3
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ffb8b1ee9a704229f0b6753970ae09dc4d6863d9;p=pandora-kernel.git

ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420

FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER),
therefore their clocks should be enabled during power domain switch.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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