From: Ben Widawsky Date: Mon, 4 Jun 2012 21:42:41 +0000 (-0700) Subject: drm/i915: CXT_SIZE register offsets added X-Git-Tag: v3.6-rc1~83^2~42^2~44 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fe1cc68fcb11ca14f420068d1806eb5e719ac772;p=pandora-kernel.git drm/i915: CXT_SIZE register offsets added The GPUs can have different default context layouts, and the sizes could vary based on platform or BIOS. In order to back the context object with a properly sized BO, we must read this register in order to find out a sufficient size. Thankfully (sarcarm!), the register moves and changes meanings throughout generations. CTX and CXT differences are intentional as that is how it is in the documentation (prior to GEN6 it was CXT). Signed-off-by: Ben Widawsky --- Reading git-diff-tree failed