From: Roland Dreier <rolandd@cisco.com>
Date: Mon, 7 Nov 2005 08:58:11 +0000 (-0800)
Subject: [PATCH] ppc32: Allow ERPN for early serial to depend on CPU type
X-Git-Tag: v2.6.15-rc1~691
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fcc188e7fdddd8b23f900e485e6b3db05e7375f4;p=pandora-kernel.git

[PATCH] ppc32: Allow ERPN for early serial to depend on CPU type

The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers
are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440
chips.  To allow for this, this patch moves the definition of the ERPN used
for mapping UART0 from being hard-coded in the head_44x.S assembly code to
being defined in ibm44x.h.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
---

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