From: Nishanth Menon <nm@ti.com>
Date: Wed, 29 Feb 2012 22:33:39 +0000 (+0100)
Subject: ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP
X-Git-Tag: sz_175~39
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fc7f2f3df65eb7f24e9760749158ef847d1aceec;p=pandora-kernel.git

ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP

SmartReflex AVS Errorgen module supplies signals to Voltage
Processor. It is suggested that by disabling Errorgen module
before we disable VP, we might be able to ensure lesser
chances of race condition to occur in the system.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
---

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