From: George Cherian <george.cherian@ti.com>
Date: Fri, 2 May 2014 06:32:03 +0000 (+0530)
Subject: ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk
X-Git-Tag: omap-for-v3.16/fixes-against-rc1~36^2~280^2~1
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f9786f419d58fc6667ba07a5590640112b31ba64;p=pandora-kernel.git

ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk

cpsw_cpts_rft_clk has got the choice of 3 clocksources
 -dpll_core_m4_ck
 -dpll_core_m5_ck
 -dpll_disp_m2_ck

By default dpll_core_m4_ck is selected, witn this as clock
source the CPTS doesnot work properly. It gives clockcheck errors
while running PTP.

 clockcheck: clock jumped backward or running slower than expected!

By selecting dpll_core_m5_ck as the clocksource fixes this issue.
In AM335x dpll_core_m5_ck is the default clocksource.

Signed-off-by: George Cherian <george.cherian@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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