From: Anton Vorontsov Date: Mon, 7 Dec 2009 22:54:35 +0000 (+0300) Subject: powerpc/fsl_pci: Fix P2P bridge handling for MPC83xx PCIe controllers X-Git-Tag: v2.6.33-rc2~25^2~3^2~11 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f93611fac7eed3aa175795fb8e452aa30af33b6a;p=pandora-kernel.git powerpc/fsl_pci: Fix P2P bridge handling for MPC83xx PCIe controllers It appears that we wrongly calculate dev_base for type1 config cycles. The thing is: we shouldn't subtract hose->first_busno because PCI core sets PCI primary, secondary and subordinate bus numbers, and PCIe controller actually takes the registers into account. So we should use just bus->number. Also, according to MPC8315 reference manual, primary bus number should always remain 0. We have PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS quirk in indirect_pci.c, but since 83xx is somewhat special, it doesn't use indirect_pci.c routines, so we have to implement the quirk specifically for 83xx PCIe controllers. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- Reading git-diff-tree failed