From: Liu Dave-r63238 <DaveLiu@freescale.com>
Date: Wed, 18 Oct 2006 08:36:56 +0000 (+0800)
Subject: [POWERPC] Fix the UCC rx/tx clock of QE
X-Git-Tag: v2.6.19-rc4~91^2~3
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f84c39da766b4c8f13872282f58286a57ad05b3e;p=pandora-kernel.git

[POWERPC] Fix the UCC rx/tx clock of QE

MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor
for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't
handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers.  This
fixes it.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
---

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