From: Philipp Zabel <p.zabel@pengutronix.de>
Date: Tue, 10 Mar 2015 14:03:43 +0000 (+0100)
Subject: gpu: ipu-v3: limit pixel clock divider to 8-bits
X-Git-Tag: omap-for-v4.2/o2_dc~72^2~11^2~1
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f7089d923eacb9c8e57d8492699662756881b54d;p=pandora-kernel.git

gpu: ipu-v3: limit pixel clock divider to 8-bits

The DI pixel clock divider bit field is only 8 bits wide for the
integer part, so limit the divider to the 1...255 interval before
deciding whether the internal clock can be used and before writing
to the register.

Reported-by: Felix Mellmann <felix.mellmann@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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