From: Sathya Perla <sathyap@serverengines.com>
Date: Tue, 29 Jun 2010 00:11:17 +0000 (+0000)
Subject: be2net: memory barrier fixes on IBM p7 platform
X-Git-Tag: v2.6.36-rc1~571^2~397
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f3eb62d2cc7da7bea4b394dd06f6bc738aa284e7;p=pandora-kernel.git

be2net: memory barrier fixes on IBM p7 platform

The ibm p7 architecure seems to reorder memory accesses more
aggressively than previous ppc64 architectures. This requires memory
barriers to ensure that rx/tx doorbells are pressed only after
memory to be DMAed is written.

Signed-off-by: Sathya Perla <sathyap@serverengines.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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