From: Kelvin Cheung <keguang.zhang@gmail.com>
Date: Fri, 10 Oct 2014 03:40:01 +0000 (+0800)
Subject: MIPS: Loongson1B: Some fixes/updates for LS1B
X-Git-Tag: omap-for-v3.19/fixes-rc1~122^2~118
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f29ad10de6c345c8ae4cb33a99ba8ff29bdcd751;p=pandora-kernel.git

MIPS: Loongson1B: Some fixes/updates for LS1B

- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
   (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
 - Add GMAC1 support and setup MUX in terms of PHY mode.
 - Add CPUFreq support.
 - Add MUX Register Definitions.
 - Add PWM Register Definitions.
 - Update clock register bitfields according to the latest spec.
 - Update clock related stuff.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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