From: Will Deacon <will.deacon@arm.com>
Date: Tue, 19 Jul 2011 21:43:28 +0000 (+0100)
Subject: ARM: perf: index PMU registers from zero
X-Git-Tag: v3.2-rc1~130^2~7^2^2~18
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ecf5a893211c26e02b9d4cfd6ba2183473ac0203;p=pandora-kernel.git

ARM: perf: index PMU registers from zero

ARM PMU code used to use 1-based indices for PMU registers. This caused
several data structures (pmu_hw_events::{active_events, used_mask, events})
to have an unused element at index zero. ARMPMU_MAX_HWEVENTS still takes
this indexing into account, and currently equates to 33.

This patch updates the core ARM perf code to use the 0th index again.

Acked-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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