From: Stephen Warren <swarren@nvidia.com>
Date: Tue, 24 Jul 2012 21:48:12 +0000 (-0600)
Subject: ARM: tegra: fix U16 divider range check
X-Git-Tag: omap-for-v3.7-rc1/fixes-cpufreq-signed~62^2~9^2~13
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=eb70e1bdd8a633e058cfb6186d45d4c8bdbdf534;p=pandora-kernel.git

ARM: tegra: fix U16 divider range check

A U16 divider can divide a clock by 1..64K. However, the range-check
in clk_div16_get_divider() limited the range to 1..256. Fix this. NVIDIA's
downstream kernels already have the fixed range-check.

In practice this is a problem on Whistler's I2C bus, which uses a bus
clock rate of 100KHz (rather than the more common 400KHz on Tegra boards),
which requires a HW module clock of 8*100KHz. The parent clock is 216MHz,
leading to a desired divider of 270. Prior to conversion to the common
clock framework, this range error was somehow ignored/irrelevant and
caused no problems. However, the common clock framework evidently has
more rigorous error-checking, so this failure causes the I2C bus to fail
to operate correctly.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
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