From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Mon, 9 Dec 2013 16:54:16 +0000 (+0200)
Subject: drm/i915: Fix 66 MHz LVDS SSC freq for gen2
X-Git-Tag: v3.14-rc1~47^2~44^2~22
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e91e941bd566ae94ed576424c9e8b31bdfc55512;p=pandora-kernel.git

drm/i915: Fix 66 MHz LVDS SSC freq for gen2

Store the SSC refclock frequency in kHz to get more accuracy. Currently
we're pretending that 66 MHz is ~66000 kHz, when in fact it is actually
~66667 kHz. By storing the less rounded kHz value we get a much better
accuracy for out pixel clock calculations.

Cc: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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