From: Steve Sakoman <steve@sakoman.com>
Date: Sun, 21 Mar 2010 16:37:54 +0000 (-0700)
Subject: OMAP3: mem.h: add ac timing info for Micron @ 200 Mhz
X-Git-Tag: v1.5.0~75
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e672e66184518447ebfbd3be50579686fb4e306e;p=pandora-x-loader.git

OMAP3: mem.h: add ac timing info for Micron @ 200 Mhz
---

diff --git a/include/asm/arch-omap3/mem.h b/include/asm/arch-omap3/mem.h
index 0e3b40a..4d17882 100644
--- a/include/asm/arch-omap3/mem.h
+++ b/include/asm/arch-omap3/mem.h
@@ -70,7 +70,8 @@ typedef enum {
 #ifdef CONFIG_3430ZEBU
 #define SDP_SDRC_MDCFG_0_DDR	(0x02582019|B_ALL) /* Infin ddr module */
 #else
-#define SDP_SDRC_MDCFG_0_DDR	(0x02584019|B_ALL) /* Infin ddr module */
+#define SDP_SDRC_MDCFG_0_DDR	(0x02584019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_XM	(0x04590019|B_ALL)
 #endif
 
 #define SDP_SDRC_MR_0_DDR		0x00000032
@@ -82,6 +83,7 @@ typedef enum {
 #define SDP_3430_SDRC_RFR_CTRL_100MHz   0x0002da01
 #define SDP_3430_SDRC_RFR_CTRL_133MHz   0x0003de01 /* 7.8us/7.5ns - 50=0x3de */
 #define SDP_3430_SDRC_RFR_CTRL_165MHz   0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
+#define SDP_3430_SDRC_RFR_CTRL_200MHz   0x0005e601 /* 7.8us/5ns - 50=0x5e6 */
 
 #define DLL_OFFSET              0
 #define DLL_WRITEDDRCLKX2DIS    1
@@ -235,6 +237,27 @@ typedef enum {
 #define MICRON_V_ACTIMB_165 ((MICRON_TCKE_165 << 12) | (MICRON_XSR_165 << 0)) | \
 				(MICRON_TXP_165 << 8) | (MICRON_TWTR_165 << 16)
 
+/* Micron part (200MHz optimized) 5 ns
+  */
+#define MICRON_TDAL_200   6
+#define MICRON_TDPL_200   3
+#define MICRON_TRRD_200   2
+#define MICRON_TRCD_200   3
+#define MICRON_TRP_200    3
+#define MICRON_TRAS_200   8
+#define MICRON_TRC_200   11
+#define MICRON_TRFC_200  15
+#define MICRON_V_ACTIMA_200 ((MICRON_TRFC_200 << 27) | (MICRON_TRC_200 << 22) | (MICRON_TRAS_200 << 18) \
+		| (MICRON_TRP_200 << 15) | (MICRON_TRCD_200 << 12) |(MICRON_TRRD_200 << 9) | \
+		(MICRON_TDPL_200 << 6) | (MICRON_TDAL_200))
+
+#define MICRON_TWTR_200   2
+#define MICRON_TCKE_200   1
+#define MICRON_TXP_200    2
+#define MICRON_XSR_200   23
+#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | (MICRON_XSR_200 << 0)) | \
+				(MICRON_TXP_200 << 8) | (MICRON_TWTR_200 << 16)
+
 /* New and compatability speed defines */
 #if defined(PRCM_CLK_CFG2_200MHZ) || defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B)
 # define L3_100MHZ   /* Use with <= 100MHz SDRAM */