From: Benjamin Li <benli@broadcom.com>
Date: Fri, 8 Jan 2010 08:51:21 +0000 (-0800)
Subject: bnx2: Flush the register writes which setup the MSI-X table
X-Git-Tag: v2.6.34-rc1~233^2~624
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e2eb8e38592f28d8be4a518f44d3385272dedddb;p=pandora-kernel.git

bnx2: Flush the register writes which setup the MSI-X table

The MSI-X table size needs to be properly set before pci_enable_msix()
is called.  But on certain machines, the writes are delayed and the
MSI-X table size is incorrectly read.  By reading the
BNX2_PCI_MSIX_CONTROL register, the writes are flushed and now
ensure that the MSI-X table is set correctly before MSI-X
is enable on the device.

This patch was originally diagnosed and authored by
Kalyan Ram Chintalapati <kalyanc@vmware.com>.

Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Kalyan Ram Chintalapati <kalyanc@vmware.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

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