From: Paul Walmsley <paul@pwsan.com>
Date: Fri, 13 Jan 2012 10:05:03 +0000 (-0700)
Subject: ARM: OMAP3: PM: allow MPU to enter low-power states even when the UART is active
X-Git-Tag: sz_beta2~37
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e24a2be5cb4e63f63e6dd76eb2e44bee59ad8b38;p=pandora-kernel.git

ARM: OMAP3: PM: allow MPU to enter low-power states even when the UART is active

For some reason, both the existing OMAP3 PM code and the OMAP3 CPUIdle
driver prevent the MPU powerdomain from entering low-power modes when
any UART isn't asleep.  Possibly it is intended to minimize the ARM
wakeup latency when UART activity arrives, but the UART has a FIFO
that should handle this for most cases, with no dropped characters.  I
may be forgetting something important, though.  And CORE/PER low-power
states are a different matter entirely.

Thanks to NeilBrown <neilb@suse.de> for reporting the problem.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Joe Woodward <jw@terrafix.co.uk>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: NeilBrown <neilb@suse.de>
---

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