From: Niklas Söderlund Date: Fri, 9 Dec 2011 16:12:15 +0000 (-0300) Subject: edac: i5100 ack error detection register after each read X-Git-Tag: v3.4-rc1~62^2~2 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=df95e42e1f20a561f2fe0a632d5b8fd6c26f1bb9;p=pandora-kernel.git edac: i5100 ack error detection register after each read If I only ack the detection register after a error have been detected I'm unable to reliably detect errors. I have verified this behavior using both an error injection DIMM and software to inject errors. I can't find any documentation supporting this behavior in Intel 5100 Memory Controller Hub Chipset, see 1. So this is all based on experimentation. [1] Intel® 5100 Memory Controller Hub Chipset http://www.intel.com/content/dam/doc/datasheet/5100- memory-controller-hub-chipset-datasheet.pdf Signed-off-by: Niklas Söderlund Signed-off-by: Mauro Carvalho Chehab --- Reading git-diff-tree failed