From: Michael Chan Date: Sat, 27 May 2006 00:48:07 +0000 (-0700) Subject: [TG3]: Add recovery logic when MMIOs are re-ordered X-Git-Tag: v2.6.18-rc1~1111^2~83 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=df3e6548186f0baa727cd6d3a492891854bd31f2;p=pandora-kernel.git [TG3]: Add recovery logic when MMIOs are re-ordered Add recovery logic when we suspect that the system is re-ordering MMIOs. Re-ordered MMIOs to the send mailbox can cause bogus tx completions and hit BUG_ON() in the tx completion path. tg3 already has logic to handle re-ordered MMIOs by flushing the MMIOs that must be strictly ordered (such as the send mailbox). Determining when to enable the flush is currently a manual process of adding known chipsets to a list. The new code replaces the BUG_ON() in the tx completion path with the call to tg3_tx_recover(). It will set the TG3_FLAG_MBOX_WRITE_REORDER flag and reset the chip later in the workqueue to recover and start flushing MMIOs to the mailbox. A message to report the problem will be printed. We will then decide whether or not to add the host bridge to the list of chipsets that do re-ordering. We may add some additional code later to print the host bridge's ID so that the user can report it more easily. The assumption that re-ordering can only happen on x86 systems is also removed. Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- Reading git-diff-tree failed