From: Imre Deak <imre.deak@intel.com>
Date: Wed, 29 Jan 2014 11:25:41 +0000 (+0200)
Subject: drm/i915: fix initial timestamps for PP sequencing logic
X-Git-Tag: v3.15-rc1~51^2~62^2~33
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=dada1a9ffccc832b0130658d26454d37bf41f610;p=pandora-kernel.git

drm/i915: fix initial timestamps for PP sequencing logic

The initial jiffies value can be non-0, so set the inital panel power
sequencer timestamps accordingly. This didn't cause a problem on 64 bit
machines but on 32 bit jiffies is initially -300*HZ, so if the panel
power is initally off in the call from edp_panel_vdd_on()->
wait_panel_power_cycle() we'd wait up to ~300 sec more than needed.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

Reading git-diff-tree failed