From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Mon, 9 Sep 2013 11:06:37 +0000 (+0300)
Subject: drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLs
X-Git-Tag: v3.13-rc1~76^2~114^2~49
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=da4a1efab8be1e373c1ad31b14deb4e422dad6cb;p=pandora-kernel.git

drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLs

Add the 120MHz refernce clock case for PCH DPLLs.

Also determine the reference clock frequency more accurately by
checking for the PLLB_REF_INPUT_SPREADSPECTRUMIN refclk input
mode. The gen2 code already checked it, but it stil assumed a
fixed 66MHz refclk. Instead we need to consult the VBT for the
real value.

v2: Fix refclk for SSC panel case

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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