From: Emilio López <emilio@elopez.com.ar>
Date: Mon, 23 Dec 2013 03:32:34 +0000 (-0300)
Subject: clk: sunxi: add gating support to PLL1
X-Git-Tag: v3.14-rc1~109^2~29^2~5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d838ff33ec3a6262f44476d8edc0303acdc16580;p=pandora-kernel.git

clk: sunxi: add gating support to PLL1

This commit adds gating support to PLL1 on the clock driver. This makes
the PLL1 implementation fully compatible with PLL4 as well.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
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