From: Gregory CLEMENT Date: Wed, 9 Jul 2014 13:40:14 +0000 (+0200) Subject: ARM: mvebu: add CA9 MPcore SoC Controller node X-Git-Tag: cleanup-for-v3.18~79^2~15^2~1 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d7f3ec2b69f692d215deb991d109a3341b0d8da9;p=pandora-kernel.git ARM: mvebu: add CA9 MPcore SoC Controller node The CA9 MPcore SoC Control block is a set of registers that allows to configure certain internal aspects of the core blocks of the SoC (Cortex-A9, L2 cache controller, etc.). In most cases, the default values are fine so they aren't many reasons to touch those registers, but there is one exception: to support cpuidle on Armada 38x, we need to modify the value of the CA9 MPcore Reset Control register. Therefore, this commit adds a new Device Tree binding for this hardware block, and uses this new binding for the Armada 38x Device Tree file. Signed-off-by: Gregory CLEMENT Signed-off-by: Thomas Petazzoni Cc: devicetree@vger.kernel.org Link: https://lkml.kernel.org/r/1404913221-17343-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper --- Reading git-diff-tree failed