From: Keith Packard <keithp@keithp.com>
Date: Thu, 28 Jul 2011 21:47:14 +0000 (-0700)
Subject: drm/i915: Flush other plane register writes
X-Git-Tag: v3.1-rc1~22^2~10^2~8^2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d74362c9e45689d8d7e3d4bcf6681c4358ef4f2e;p=pandora-kernel.git

drm/i915: Flush other plane register writes

Writes to the plane control register are buffered in the chip until a
write to the DSPADDR (pre-965) or DSPSURF (post-965) register occurs.

This patch adds flushes in:

	intel_enable_plane
	gen6_init_clock_gating
	ivybridge_init_clock_gating

Signed-off-by: Keith Packard <keithp@keithp.com>
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