From: Imre Deak <imre.deak@intel.com>
Date: Tue, 9 Jul 2013 14:05:26 +0000 (+0300)
Subject: drm/i915: fix lane bandwidth capping for DP 1.2 sinks
X-Git-Tag: v3.11-rc2~17^2~2^2~4
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d4eead50eb206b875f54f66cc0f6ec7d54122c28;p=pandora-kernel.git

drm/i915: fix lane bandwidth capping for DP 1.2 sinks

DP 1.2 compatible displays may report a 5.4Gbps maximum bandwidth which
the driver will treat as an invalid value and use 1.62Gbps instead. Fix
this by capping to 2.7Gbps for sinks reporting a 5.4Gbps max bw.

Also add a warning for reserved values.

v2:
- allow only bw values explicitly listed in the DP standard (Daniel,
  Chris)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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