From: Sergei Shtylyov Date: Fri, 10 Aug 2007 16:58:46 +0000 (+0400) Subject: pata_hpt37x: actually clock HPT374 with 50 MHz DPLL (take 2) X-Git-Tag: v2.6.23-rc4~131^2~3 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d44a65f7bb0dae0bcc78de336b55a75b30ec2d2a;p=pandora-kernel.git pata_hpt37x: actually clock HPT374 with 50 MHz DPLL (take 2) The DPLL tuning code always set up it for 66 MHz due to wrong UltraDMA mask including mode 5 used to check for the necessity of 66 MHz clocking -- this caused 66 MHz clock to be used for HPT374 chip that does not tolerate it. While fixing this, also remove PLL mode from the TODO list -- I don't think it's still a relevant item. Signed-off-by: Sergei Shtylyov Signed-off-by: Jeff Garzik --- Reading git-diff-tree failed