From: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
Date: Mon, 28 Apr 2014 15:23:44 +0000 (+0400)
Subject: fsl-usb: do not test for PHY_CLK_VALID bit on controller version 1.6
X-Git-Tag: omap-for-v3.16/fixes-against-rc1~215^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d183c81929beeba842b74422f754446ef2b8b49c;p=pandora-kernel.git

fsl-usb: do not test for PHY_CLK_VALID bit on controller version 1.6

Per reference manuals of Freescale P1020 and P2020 SoCs, USB controller
present in these SoCs has bit 17 of USBx_CONTROL register marked as
Reserved - there is no PHY_CLK_VALID bit there.

Testing for this bit in ehci_fsl_setup_phy() behaves differently on two
P1020RDB boards available here - on one board test passes and fsl-usb
init succeeds, but on other board test fails, causing fsl-usb init to
fail.

This patch changes ehci_fsl_setup_phy() not to test PHY_CLK_VALID on
controller version 1.6 that (per manual) does not have this bit.

Signed-off-by: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

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