From: Damien Lespiau <damien.lespiau@intel.com>
Date: Fri, 6 Mar 2015 18:50:51 +0000 (+0000)
Subject: drm/i915/skl: Restore pipe interrupt registers after power well enabling
X-Git-Tag: omap-for-v4.1/fixes-rc1~82^2~24^2~49
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d14c03431340d0913f067ab18b6444e0f41d4f80;p=pandora-kernel.git

drm/i915/skl: Restore pipe interrupt registers after power well enabling

The pipe interrupt registers are in the actual pipe power well, so we
need to restore them when re-enable the corresponding power well.

I've also copied what we do on HSW/BDW for VGA, even if the we haven't
enabled unclaimed registers just yet.

v2: Don't run skl_power_well_post_enable() if the power well is already
    enabled (Paulo)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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