From: Will Deacon <will.deacon@arm.com>
Date: Wed, 19 Dec 2012 14:01:08 +0000 (+0100)
Subject: ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs
X-Git-Tag: v3.8-rc1~15^2~1
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d056a699dd3d9366dd3b4d9996e7848209199cda;p=pandora-kernel.git

ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs

flush_cache_louis flushes the D-side caches to the point of unification
inner-shareable. On uniprocessor CPUs, this is defined as zero and
therefore no flushing will take place. Rather than invent a new interface
for UP systems, instead use our SMP_ON_UP patching code to read the
LoUU from the CLIDR instead.

Cc: <stable@vger.kernel.org>
Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

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