From: Chen-Yu Tsai <wens@csie.org>
Date: Sat, 6 Sep 2014 06:45:10 +0000 (+0800)
Subject: clk: sunxi: add correct divider table for sun4i-apb0 clock
X-Git-Tag: fixes-against-v3.18-rc2~68^2~11^2~10
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cfe4c93b58924b3764cd7269d3d953049405e938;p=pandora-kernel.git

clk: sunxi: add correct divider table for sun4i-apb0 clock

The sun4i-apb0 clock, as found on all platforms using it, is a
power-of-two-based divider clock, with a special divider of 2
for value 0.

This was causing the clock framework to incorrectly calculate
the clock rate for apb1 and related modules on sun6i and sun8i.
On sun[4/5/7]i, u-boot SPL configures the divider with value 1
for /2 divider, so no suprises there.

This patch adds a proper divider table for it, so the correct
clock rate can be calculated.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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