From: Markos Chandras Date: Mon, 10 Nov 2014 12:25:34 +0000 (+0000) Subject: MIPS: cpu-probe: Set the FTLB probability bit on supported cores X-Git-Tag: omap-for-v3.19/fixes-for-merge-window~62^2~8 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cf0a8aa0226da5de88011e7f30eff22a894b2f49;p=pandora-kernel.git MIPS: cpu-probe: Set the FTLB probability bit on supported cores Make use of the Config6/FLTBP bit to set the probability of a TLBWR instruction to hit the FTLB or the VTLB. A value of 0 (which may be the default value on certain cores, such as proAptiv or P5600) means that a TLBWR instruction will never hit the VTLB which leads to performance limitations since it effectively decreases the number of available TLB slots. Signed-off-by: Markos Chandras Reviewed-by: James Hogan Cc: # v3.15+ Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8368/ Signed-off-by: Ralf Baechle --- Reading git-diff-tree failed