From: Chander Kashyap <chander.kashyap@linaro.org>
Date: Thu, 26 Sep 2013 09:06:35 +0000 (+0530)
Subject: clk: exynos5420: fix cpll clock register offsets
X-Git-Tag: v3.14-rc1~109^2~51
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cdf64eeeb0d762585e2126f3024458d199c2635d;p=pandora-kernel.git

clk: exynos5420: fix cpll clock register offsets

Fixes cpll control and lock register offset values for Exynos5420 SoC.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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