From: Marek Vasut Date: Mon, 10 Aug 2015 20:17:46 +0000 (+0200) Subject: arm: socfpga: Make the pinmux table const u8 X-Git-Tag: v2015.10-rc3~96^2~7 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cc9429a5562489cf8a4eb0d722c36e1bdfde4907;p=pandora-u-boot.git arm: socfpga: Make the pinmux table const u8 Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long. By changing the type to u8, we can save over 600 Bytes from the SPL, so do it. This patch also constifies the array. Signed-off-by: Marek Vasut --- diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index 46af30b640e..8712f8ea117 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -12,8 +12,7 @@ void sysmgr_pinmux_init(void); void sysmgr_config_warmrstcfgio(int enable); -void sysmgr_get_pinmux_table(const unsigned long **table, - unsigned int *table_len); +void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len); #endif struct socfpga_system_manager { diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh index 16d3a2ac0c0..c1640bc32a9 100755 --- a/arch/arm/mach-socfpga/qts-filter.sh +++ b/arch/arm/mach-socfpga/qts-filter.sh @@ -66,7 +66,7 @@ process_pinmux_config() { EOF # Retrieve the pinmux config and zap the ad-hoc length encoding - sed -n '/^unsigned/ !b; :next {/^unsigned/ s/\[.*\]/[]/;p;n;b next}' \ + sed -n '/^unsigned/ !b; :next {/^unsigned/ {s/\[.*\]/[]/;s/unsigned long/const u8/};p;n;b next}' \ ${in_dir}/generated/pinmux_config_${soc}.c cat << EOF diff --git a/arch/arm/mach-socfpga/system_manager.c b/arch/arm/mach-socfpga/system_manager.c index 744ec326b49..75a65f3e623 100644 --- a/arch/arm/mach-socfpga/system_manager.c +++ b/arch/arm/mach-socfpga/system_manager.c @@ -57,7 +57,7 @@ static void populate_sysmgr_fpgaintf_module(void) void sysmgr_pinmux_init(void) { uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0]; - const unsigned long *sys_mgr_init_table; + const u8 *sys_mgr_init_table; unsigned int len; int i; diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c index bcb77814430..a12f0b32a4f 100644 --- a/arch/arm/mach-socfpga/wrap_pinmux_config.c +++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c @@ -10,8 +10,7 @@ /* Board-specific header. */ #include -void sysmgr_get_pinmux_table(const unsigned long **table, - unsigned int *table_len) +void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len) { *table = sys_mgr_init_table; *table_len = ARRAY_SIZE(sys_mgr_init_table); diff --git a/board/altera/arria5-socdk/qts/pinmux_config.h b/board/altera/arria5-socdk/qts/pinmux_config.h index 5a714a37831..069d492d521 100644 --- a/board/altera/arria5-socdk/qts/pinmux_config.h +++ b/board/altera/arria5-socdk/qts/pinmux_config.h @@ -7,7 +7,7 @@ #ifndef __SOCFPGA_PINMUX_CONFIG_H__ #define __SOCFPGA_PINMUX_CONFIG_H__ -unsigned long sys_mgr_init_table[] = { +const u8 sys_mgr_init_table[] = { 0, /* EMACIO0 */ 2, /* EMACIO1 */ 2, /* EMACIO2 */ diff --git a/board/altera/cyclone5-socdk/qts/pinmux_config.h b/board/altera/cyclone5-socdk/qts/pinmux_config.h index aa282e17053..33cf1fdb64e 100644 --- a/board/altera/cyclone5-socdk/qts/pinmux_config.h +++ b/board/altera/cyclone5-socdk/qts/pinmux_config.h @@ -7,7 +7,7 @@ #ifndef __SOCFPGA_PINMUX_CONFIG_H__ #define __SOCFPGA_PINMUX_CONFIG_H__ -unsigned long sys_mgr_init_table[] = { +const u8 sys_mgr_init_table[] = { 3, /* EMACIO0 */ 3, /* EMACIO1 */ 3, /* EMACIO2 */