From: Thomas Abraham <thomas.ab@samsung.com>
Date: Mon, 14 Jul 2014 13:38:34 +0000 (+0530)
Subject: clk: samsung: register exynos5420 apll/kpll configuration data
X-Git-Tag: omap-for-v3.17/fixes-against-rc2~188^2~2^2~1
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ca5b4029382245397dd6829c6321121cab1a1471;p=pandora-kernel.git

clk: samsung: register exynos5420 apll/kpll configuration data

Register the PLL configuration data for APLL and KPLL on Exynos5420. This
configuration data table specifies PLL coefficients for supported PLL
clock speeds when a 24MHz clock is supplied as the input clock source
for these PLLs.

Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: Arjun K.V <arjun.kv@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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