From: Paul Mundt Date: Fri, 17 Apr 2009 07:38:00 +0000 (+0900) Subject: sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register. X-Git-Tag: v2.6.31-rc1~392^2~41^2~124^3~34 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c66c1d79a94a7a302e2dc6c93da40902423eac3e;p=pandora-kernel.git sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register. The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt --- Reading git-diff-tree failed