From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Thu, 2 Feb 2006 16:34:01 +0000 (+0900)
Subject: [MIPS] TX49 MFC0 bug workaround
X-Git-Tag: v2.6.16-rc3~137^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c226f2601f55010936f0f3c77ae167a02339f566;p=pandora-kernel.git

[MIPS] TX49 MFC0 bug workaround

If mfc0 $12 follows store and the mfc0 is last instruction of a
page and fetching the next instruction causes TLB miss, the result
of the mfc0 might wrongly contain EXL bit.

ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008

Workaround: mask EXL bit of the result or place a nop before mfc0.  It
doesn't harm to always clear those bits, so we change the code to do so.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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