From: Jani Nikula <jani.nikula@intel.com>
Date: Fri, 6 Sep 2013 04:40:05 +0000 (+0300)
Subject: drm/i915: add support for per-pipe power sequencing on vlv
X-Git-Tag: v3.13-rc1~76^2~114^2~78
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bf13e81b904a37d94d83dd6c3b53a147719a3ead;p=pandora-kernel.git

drm/i915: add support for per-pipe power sequencing on vlv

VLV has per-pipe PP registers. Set up power sequencing on mode set. The
connector init time setup is problematic, since we don't have a pipe at
that time. Cook up something.

v2:
 - use vlv_power_sequencer_pipe() also in _pp_{ctrl,stat}_reg()
 - use PANEL_PORT_SELECT_DPC_VLV (Ville)

v3: make checkpatch happier

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Make checkpatch a bit more happier still ...]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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