From: Kevin Cernekee Date: Tue, 21 Oct 2014 04:27:58 +0000 (-0700) Subject: MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUs X-Git-Tag: omap-for-v3.20/drop-legacy-3517~119^2~109 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bbf2ba67cdbdb3676a661c3eba5572d1e513627f;p=pandora-kernel.git MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUs BMIPS438x has a 64-byte D$ line size and BMIPS5000 has a 128-byte L2 line size. If L1_CACHE_SHIFT is undersized, DMA buffers will not be cacheline-aligned and terrible things will happen. Signed-off-by: Kevin Cernekee Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8164/ Signed-off-by: Ralf Baechle --- Reading git-diff-tree failed