From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Thu, 14 Feb 2013 19:53:51 +0000 (+0200)
Subject: drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+
X-Git-Tag: v3.9-rc1~83^2~11^2~6
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b9e1faa7634e68bfcdff00a8e9378fcb662a7f30;p=pandora-kernel.git

drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+

The bit controlling whether PIPE_CONTROL DW/QW write targets
the global GTT or PPGTT moved moved from DW 2 bit 2 to
DW 1 bit 24 on IVB.

I verified on IVB that the fix is in fact effective. Without the fix
none of the scratch writes actually landed in the pipe control page.
With the fix the writes show up correctly.

v2: move PIPE_CONTROL_GLOBAL_GTT_IVB setup to where other flags are set

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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