From: Benoit Cousson Date: Tue, 3 Jun 2014 12:02:24 +0000 (+0900) Subject: ARM: shmobile: r8a7790/lager dts: Add DVFS parameters into cpu0 node for r8a7790 X-Git-Tag: omap-for-v3.17/fixes-against-rc2~120^2~31^2~22 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b989e1386385466761f703b8a91e00468bb5ca2a;p=pandora-kernel.git ARM: shmobile: r8a7790/lager dts: Add DVFS parameters into cpu0 node for r8a7790 Add needed information inside CPU0 for the generic cpufreq-cpu0 driver. - voltage-tolerance = 1% It reflects the tolerance for the CPU voltage defined inside the OPP table. Due to the lack of proper OPP definition, use an arbitrary safe value. - clock-latency = 300 us Approximate worst-case latency to do a full DVFS transition for every OPPs. Due to the lack of HW information, use an arbitrary safe value. Note: The term transition-latency will be more accurate to define this value since the clock transition latency is not the only parameter that will define the overall DVFS transition. - operating-points = < kHz - uV > List of 6 operating points. All of them are using the same voltage since the valid Vmin voltage is not documented in the HW spec. - clocks phandle to the CPU clock source. This clock source is used for all the 4 CortexA15 located inside the same cluster. Signed-off-by: Benoit Cousson [gaku.inami.xw@bp.renesas.com: Change the setting of OPPs for ES2.0] Signed-off-by: Gaku Inami Acked-by: Magnus Damm Signed-off-by: Simon Horman --- Reading git-diff-tree failed