From: Stephen Warren <swarren@nvidia.com>
Date: Fri, 9 Aug 2013 14:49:25 +0000 (+0200)
Subject: PCI: tegra: set up PADS_REFCLK_CFG1
X-Git-Tag: v3.12-rc1~115^2~13^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b02b07adb159166f57d5e66e67ab1ae9de254229;p=pandora-kernel.git

PCI: tegra: set up PADS_REFCLK_CFG1

The registers PADS_REFCLK_CFG are an array of 16-bit data, one entry per
PCIe root port. For Tegra30, we therefore need to write a 3rd entry in
this array. Doing so makes the mini-PCIe slot on Beaver operate correctly.

While we're at it, add some #defines to partially document the fields
within these 16-bit values.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---

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