From: Florian Fainelli <florian@openwrt.org>
Date: Tue, 14 Jan 2014 17:54:40 +0000 (-0800)
Subject: MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
X-Git-Tag: v3.14-rc1~37^2~6
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=af2418be63b4e994cfe4b625939d65b9afdfdf6c;p=pandora-kernel.git

MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value

Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift
value of 4) instead of the currently configured 32 bytes L1-cache line
size.

Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
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