From: Bjorn Helgaas Date: Thu, 1 Sep 2016 13:52:29 +0000 (-0500) Subject: PCI: Mark Haswell Power Control Unit as having non-compliant BARs X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=abb5b523f2151a9a310d7ab646cc2a63cd5a6b0f;p=pandora-kernel.git PCI: Mark Haswell Power Control Unit as having non-compliant BARs commit 6af7e4f77259ee946103387372cb159f2e99a6d4 upstream. The Haswell Power Control Unit has a non-PCI register (CONFIG_TDP_NOMINAL) where BAR 0 is supposed to be. This is erratum HSE43 in the spec update referenced below: The PCIe* Base Specification indicates that Configuration Space Headers have a base address register at offset 0x10. Due to this erratum, the Power Control Unit's CONFIG_TDP_NOMINAL CSR (Bus 1; Device 30; Function 3; Offset 0x10) is located where a base register is expected. Mark the PCU as having non-compliant BARs so we don't try to probe any of them. There are no other BARs on this device. Rename the quirk so it's not Broadwell-specific. Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-datasheet-vol-2.html (section 5.4, Device 30 Function 3) Link: https://bugzilla.kernel.org/show_bug.cgi?id=153881 Reported-by: Paul Menzel Tested-by: Prarit Bhargava Signed-off-by: Bjorn Helgaas Acked-by: Myron Stowe Signed-off-by: Ben Hutchings --- Reading git-diff-tree failed