From: Marek Vasut <marex@denx.de>
Date: Tue, 23 Apr 2024 23:15:18 +0000 (+0200)
Subject: ARM: dts: imx: Enable PCIe and NVMe on DH i.MX8M Plus DHCOM PDK3
X-Git-Tag: v2024.07-rc2~23^2~5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=aa0a79f3373cccee70923f252111b404d66dfa1a;p=pandora-u-boot.git

ARM: dts: imx: Enable PCIe and NVMe on DH i.MX8M Plus DHCOM PDK3

Enable PCIe/NVMe support on DH i.MX8M Plus DHCOM PDK3. Except for
the configuration options which are enabled, add slight adjustment
to board u-boot.dtsi, which is necessary as there is currently no
driver for the I2C PCIe clock generator. Since the generator is
strapped to be always on, it is possible to supplant the generator
functionality by fixed-clock.

Signed-off-by: Marek Vasut <marex@denx.de>
---

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
index 040f333c52d..b0b99d51856 100644
--- a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
@@ -4,3 +4,15 @@
  */
 
 #include "imx8mp-dhcom-u-boot.dtsi"
+
+/ {
+	clk_pcie100: clk-pcie100 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+	};
+};
+
+&pcie_phy {
+	clocks = <&clk_pcie100>;
+};
diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig
index 73079df6b25..5b338f22195 100644
--- a/configs/imx8mp_dhcom_pdk3_defconfig
+++ b/configs/imx8mp_dhcom_pdk3_defconfig
@@ -34,6 +34,7 @@ CONFIG_ENV_OFFSET_REDUND=0xFF0000
 CONFIG_IMX_BOOTAUX=y
 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
 CONFIG_SYS_LOAD_ADDR=0x50000000
+CONFIG_PCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
@@ -104,6 +105,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_BKOPS_ENABLE=y
 CONFIG_CMD_MTD=y
 CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_READ=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -216,7 +218,10 @@ CONFIG_DWC_ETH_QOS_IMX=y
 CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
 CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y