From: Ben Widawsky <ben@bwidawsk.net>
Date: Tue, 9 Apr 2013 01:43:47 +0000 (-0700)
Subject: drm/i915: generalize pte vs. register BAR allocation
X-Git-Tag: omap-for-v3.10/dt-fixes-for-merge-window~55^2~40^2~41
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a93e41618ecf69a2ced005a13377d7903da4dd62;p=pandora-kernel.git

drm/i915: generalize pte vs. register BAR allocation

All gen6+ parts so far have 1 BAR which holds both the register space
and the GTT PTEs. Up until now, that was a 4MB BAR with half allocated
to each.

I have a strong hunch (wink, nod, wink) that future gens will also keep
a similar 50-50 split though the sizes may change. To help this along
change the code to obey the rule of half the total size instead of a
hard-coded 2MB.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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