From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Date: Thu, 17 Jun 2010 11:36:13 +0000 (+0900)
Subject: MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADE
X-Git-Tag: v2.6.36-rc1~563^2~75
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9e6f39698ac66e08017114a51600bf633becd011;p=pandora-kernel.git

MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADE

Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only.  We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

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